ZHCS034C January 2011 – August 2018 TCA4311A
PRODUCTION DATA.
- 1 特性
- 2 應用
- 3 說明
- 4 修訂歷史記錄
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Parameter Measurement Information
- 8 Detailed Description
-
9 Application and Implementation
- 9.1 Application Information
- 9.2
Typical Application
- 9.2.1 Design Requirements
- 9.2.2 Detailed Design Procedure
- 9.2.3 Application Curves
- 9.2.4 Live Insertion and Capacitance Buffering CompactPCI Application
- 9.2.5 Live Insertion and Capacitance Buffering PCI Application
- 9.2.6 Repeater/Bus Extender Application
- 9.2.7 Systems With Disparate Supply Voltages
- 10Power Supply Recommendations
- 11Layout
- 12器件和文檔支持
- 13機械、封裝和可訂購信息
8.4.3 Missing ACK Event
When the slave (or master) device sends an ACK bit, a logic low on SDA during the 9th clock cycle, the slave (or master) may pull the SDA line low while the rise time accelerators are engaged and the master (or slave) side stays high. The rise time accelerators are engaged when the voltage is above 0.6 V (typical) and the slew rate is above 1.25 V/us. In Figure 8, SDAOUT is a slave attempting to send an ACK bit. SDAOUT pulls to a logic low, but the ACK is not transferred to the other side and SDAIN remains high unexpectedly. The timing window in which this occurs has been approximated to 1 nanosecond and can vary with the loading on the bus.
Figure 8. Missing ACK