SLASF75 November 2023 TAS2572
PRODUCTION DATA
5 Pin Configuration and Functions
Figure 5-1 Package Top Level View Pinout Pin Functions
| PIN | I/O1 | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| AD1 | B4 | I | I2C address pin LSB. |
| AD2 | B5 | I | I2C address pin LSB+1. |
| BGND | D1 | P | Boost ground. Connect to PCB GND plane strongly with multiple vias. |
| D2 | |||
| D3 | |||
| DREG | A6 | P | Digital core voltage regulator output. Bypass to GND with a capacitor. Do not connect to external load. |
| FSYNC | A2 | I | I2S word clock or TDM frame sync. |
| GREG | F4 | P | High-side gate CP regulator output. Do not connect to external load. |
| GND | A3 | P | Digital ground. Connect to PCB GND plane. Strong connection to ground plane required through multiple vias. |
| C2 | |||
| C5 | |||
| IOVDD | A4 | P | 1.2-V or 1.8-V Digital IO supply. Decouple to GND with capacitor. |
| IRQZ | B3 | O | Open drain, active low interrupt pin. Pull up to IOVDD with resistor if optional internal pullup is not used. |
| OUT_N | F5 | O | Class-D negative output. |
| OUT_P | F6 | O | Class-D positive output. |
| PGND | D4 | P | Class-D Power stage ground. Connect to PCB GND plane strongly through multiple vias. |
| D5 | |||
| D6 | |||
| E4 | |||
| PVDD | F1 | P | Integrated boost output and Class-D power stage supply. |
| F2 | |||
| F3 | |||
| SBCLK | A1 | I | I2S/TDM serial bit clock. |
| SCL | B6 | I | I2C Clock Pin. Pull up to IOVDD with a resistor. |
| SDA | A5 | IO | I2C Data Pin. Pull up to IOVDD with a resistor. |
| SDIN | B2 | I | I2S or TDM serial data input. |
| SDOUT | B1 | IO | I2S or TDM serial data output. |
| SDZ | C3 | I | Active low hardware shutdown. |
| SW | E1 | P | Boost converter switch input. |
| E2 | |||
| E3 | |||
| VBAT | C1 | P | Battery power supply input. Connect to 2.5-V to 5.5-V supply and decouple with a cap. |
| VBAT_SNS | C4 | I | Battery sense terminal. Connect to 1S or 2S battery supply for remote battery sensing. Ground the pin if remote sensing is not used. |
| VDD | C6 | P | Analog, digital power supply. Connect to 1.8-V supply and decouple to GND with cap. |
| VSNS_N | E5 | I | Voltage sense negative input. Connect to speaker negative terminal as close to speaker as possible. Add series resistor if EMI filter is used. |
| VSNS_P | E6 | I | Voltage sense positive input. Connect to speaker positive terminal as close to speaker as possible. Add series resistor if EMI filter is used. |
- I = Input, O = Output, I/O = Input or Output, G = Ground, P = Power.