SCAS295T January 1993 – July 2014 SN54LVC373A , SN74LVC373A
PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Simplified Schematic
- 5 Revision History
- 6 Pin Configuration and Functions
-
7 Specifications
- 7.1 Absolute Maximum Ratings
- 7.2 Handling Ratings
- 7.3 Recommended Operating Conditions
- 7.4 Thermal Information
- 7.5 Electrical Characteristics
- 7.6 Timing Requirements, SN54LVC373A
- 7.7 Timing Requirements, SN74LVC373A
- 7.8 Switching Characteristics, SN54LVC373A
- 7.9 Switching Characteristics, SN74LVC373A
- 7.10 Operating Characteristics
- 7.11 Typical Characteristics
- 8 Parameter Measurement Information
- 9 Detailed Description
- 10Application and Implementation
- 11Power Supply Recommendations
- 12Layout
- 13Device and Documentation Support
- 14Mechanical, Packaging, and Orderable Information
封裝選項
請參考 PDF 數據表獲取器件具體的封裝圖。
機械數據 (封裝 | 引腳)
- DGV|20
- DB|20
- NS|20
- N|20
- DW|20
- PW|20
- RGY|20
散熱焊盤機械數據 (封裝 | 引腳)
- RGY|20
訂購信息
12 Layout
12.1 Layout Guidelines
When using multiple bit logic devices inputs should never float.
In many cases, functions or parts of functions of digital logic devices are unused, for example, when only two inputs of a triple-input AND gate are used or only 3 of the 4 buffer gates are used. Such input pins should not be left unconnected because the undefined voltages at the outside connections result in undefined operational states. Figure 6 specifies the rules that must be observed under all circumstances. All unused inputs of digital logic devices must be connected to a high or low bias to prevent them from floating. The logic level that should be applied to any particular unused input depends on the function of the device. Generally they will be tied to GND or VCC, whichever makes more sense or is more convenient. It is generally acceptable to float outputs, unless the part is a transceiver.
12.2 Layout Example
Figure 6. Layout Diagram