ZHCSRW4D February 2001 – March 2023 SN74LV166A
PRODMIX
請(qǐng)參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
D, DB, DGV, NS, or PW
Package| PIN | I/O | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| SER | 1 | I | Serial Output |
| A | 2 | I | Parallel Input |
| B | 3 | I | Parallel Input |
| C | 4 | I | Parallel Input |
| D | 5 | I | Parallel Input |
| CLK | 7 | I | Clock input |
| GND | 8 | __ | Ground |
| CLR | 9 | I | Clear input, active low |
| E | 10 | I | Parallel Input |
| F | 11 | I | Parallel Input |
| G | 12 | I | Parallel Input |
| QH | 13 | O | QH output |
| H | 14 | I | Parallel input H |
| SH/ LD | 15 | I | Shift/ load input, enable shifting when input is high, load data when input is low |
| VCC | 16 | __ | Power Pin |