9.3.1 TXD Dominant Timeout (DTO)

During normal mode (the only mode where the CAN driver is active), the TXD DTO circuit prevents the transceiver from blocking network communication in the event of a hardware or software failure where TXD is held dominant longer than the timeout period t_{TXD_DTO}. The DTO circuit timer starts on a falling edge on TXD. The DTO circuit disables the CAN bus driver if no rising edge is seen before the timeout period expires, which frees the bus for communication between other nodes on the network. The CAN driver is reactivated when a recessive signal is seen on TXD pin, thus clearing the TXD DTO condition. The receiver and RXD pin still reflect the CAN bus, and the bus pins are biased to recessive level during a TXD dominant timeout.

9.3.2 RXD Dominant Timeout (SN65HVD257)

The SN65HVD257 device has a RXD dominant timeout (RXD DTO) circuit that prevents a bus stuck dominant fault from permanently driving the RXD output dominant (low) when the bus is held dominant longer than the timeout period t_{RXD_DTO}. The RXD DTO timer starts on a falling edge on RXD (bus going dominant). If no rising edge (bus returning recessive) is seen before the timeout constant of the circuit expires (t_{RXD_DTO}), the RXD pin returns high (recessive). The RXD output is reactivated to mirror the bus receiver output when a recessive signal is seen on the bus, clearing the RXD dominant timeout. The CAN bus pins are biased to the recessive level during a RXD DTO.

9.3.3 Thermal Shutdown

If the junction temperature of the device exceeds the thermal shut down threshold, the device turns off the CAN driver circuits thus blocking the TXD to bus transmission path. The shutdown condition is cleared when the junction temperature drops below the thermal shutdown temperature of the device.

9.3.4 Undervoltage Lockout

The supply pins have undervoltage detection that places the device in protected mode, which protects the bus during an undervoltage event on either the V_CC or V_RXD supply pins.

9.3.5 FAULT Pin (SN65HVD257)

If one or more of the faults (TXD dominant timeout, RXD dominant timeout, thermal shutdown or undervoltage lockout) occurs, the FAULT pin (open-drain) turns off, resulting in a high level when externally pulled up to V_CC or I/O supply.

Figure 12. FAULT Pin Function Diagram and Application

Figure 13. Example Timing Diagram for TXD DTO and FAULT Pin

Figure 14. Example Timing Diagram for Devices With and Without RXD DTO and FAULT Pin

9.3.6 Unpowered Device

The SN65HVD25x device is designed to be an ideal passive or no load to the CAN bus if it is unpowered. The bus pins (CANH, CANL) have extremely low leakage currents when the device is unpowered, so they will not load down the bus. This is critical if some nodes of the network will be unpowered while the rest of the of network remains in operation. The logic pins also have extremely low leakage currents when the device is unpowered to avoid loading down other circuits that may remain powered.

9.3.7 Floating Pins

The device has internal pullups and pulldowns on critical pins to place the device into known states if the pins float. The TXD pin is pulled up to V_CC to force a recessive input level if the pin floats. The S pin is pulled down to GND to force the device into normal mode if the pin floats.

9.3.8 CAN Bus Short-Circuit Current Limiting

The SN65HVD25x device has several protection features that limit the short circuit current when a CAN bus line is shorted. These features include driver current limiting (dominant and recessive). The device has TXD dominant state time out to prevent permanent higher short circuit current of the dominant state during a system fault. During CAN communication, the bus switches between dominant and recessive states with the data and control fields bits; thus the short circuit current may be viewed either as the instantaneous current during each bus state or as a DC average current. For system current (power supply) and power considerations in the termination resistors and common-mode choke ratings, use the average short circuit current. Determine the ratio of dominant and recessive bits by the data in the CAN frame plus the following factors of the protocol and PHY that force either recessive or dominant at the following times:

• Control fields with set bits
• Bit stuffing
• Interframe space
• TXD dominant time out (fault case limiting)

These factors ensure a minimum recessive amount of time on the bus even if the data field contains a high percentage of dominant bits.

The short circuit current of the bus depends on the ratio of recessive to dominant bits and their respective short circuit currents. The average short circuit current may be calculated with Equation 1.

where:
I_OS(AVG) is the average short circuit current
%Transmit is the percentage the node is transmitting CAN messages
%Receive is the percentage the node is receiving CAN messages
%REC_Bits is the percentage of recessive bits in the transmitted CAN messages
%DOM_Bits is the percentage of dominant bits in the transmitted CAN messages
I_{OS(SS)_REC} is the recessive steady state short circuit current
I_{OS(SS)_DOM} is the dominant steady state short circuit current

Table 4. Driver Function Table

Table 5. Receiver Function Table

9.4.1 Operating Modes

The device has two main operating modes: normal mode and silent mode. Operating mode selection is made via the S input pin.

9.4.2 Can Bus States

The CAN bus has two states during powered operation of the device: dominant and recessive. A dominant bus state is when the bus is driven differentially, corresponding to a logic low on the TXD and RXD pin. A recessive bus state is when the bus is biased to V_CC / 2 via the high-resistance internal input resistors R_IN of the receiver, corresponding to a logic high on the TXD and RXD pins. See Figure 15 and Figure 16.

Figure 15. Bus States (Physical Bit Representation)

Figure 16. Simplified Recessive Common Mode Bias and Receiver

9.4.3 Normal Mode

Select the normal mode of device operation by setting S low. The CAN driver and receiver are fully operational and CAN communication is bidirectional. The driver is translating a digital input on TXD to a differential output on CANH and CANL. The receiver is translating the differential signal from CANH and CANL to a digital output on RXD.

9.4.4 Silent Mode

Activate silent mode (receive only) by setting S high. The CAN driver is turned off while the receiver remains active and RXD outputs the received bus state.

9.4.5 Digital Inputs and Outputs