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ZHCSFG5A September 2016 – November 2016 SN65HVD233-Q1 , SN65HVD234-Q1 , SN65HVD235-Q1

PRODUCTION DATA.

封裝選項

機械數(shù)據(jù) (封裝 | 引腳)

D|8
- MSOI002K

散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)

訂購信息

8 Specifications

8.1 Absolute Maximum Ratings

over operating ambient temperature range unless otherwise noted⁽¹⁾⁽²⁾

		MIN	MAX	UNIT
V_CC	Supply voltage	–0.3	7	V
	Voltage at any bus terminal (CANH or CANL)	–36	36	V
	Voltage input, transient pulse, CANH and CANL, through 100 Ω (see Figure 18)	–100	100	V
V_I	Input voltage, (AB, EN, LBK, RS, TXD)	–0.5	7	V
V_O	Output voltage (RXD)	–0.5	7	V
I_O	Receiver output current	–10	10	mA
T_J	Operating junction temperature	–40	150	°C
T_stg	Storage temperature		125	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltage values, except differential I/O bus voltages, are with respect to the network ground pin.

8.2 ESD Ratings

				VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human-body model (HBM), per AEC Q100-002⁽¹⁾	CANH, CANL to GND	±12 000	V
			Between CANH and CANL	±16 000
			All pins	±3 000
		Charged-device model (CDM), per AEC Q100-011		±1 000

(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

8.3 Recommended Operating Conditions

			MIN	MAX	UNIT
V_CC	Supply voltage		3	3.6	V
	Voltage at any bus terminal (separately or common mode)		–7	12	V
V_IH	High-level input voltage	EN, AB, LBK, TXD	2	5.5	V
V_IL	Low-level input voltage	EN, AB, LBK, TXD	0	0.8	V
V_ID	Differential input voltage between CANH and CANL		–6	6	V
	Resistance from RS to ground		0	100	kΩ
V_I(Rs)	Input voltage at RS for standby		0.75 V_CC	5.5	V
I_OH	High-level output current	Driver	–50		mA
I_OH	High-level output current	Receiver	–10		mA
I_OL	Low-level output current	Driver		50	mA
I_OL	Low-level output current	Receiver		10	mA
T_A	Operating ambient temperature⁽¹⁾		–40	125	°C

(1) Maximum ambient temperature operation is allowed as long as the device maximum junction temperature is not exceeded.

8.4 Thermal Information

THERMAL METRIC⁽¹⁾		SN65HVD23x-Q1	UNIT
		D (SOIC)
		8 PINS
R_θJA	Junction-to-ambient thermal resistance	102.8	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	45.1	°C/W
R_θJB	Junction-to-board thermal resistance	43.8	°C/W
ψ_JT	Junction-to-top characterization parameter	7.3	°C/W
ψ_JB	Junction-to-board characterization parameter	43.2	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

8.5 Electrical Characteristics: Driver

over operating ambient temperature range (unless otherwise noted)

PARAMETER				TEST CONDITIONS	MIN	TYP⁽¹⁾	MAX	UNIT
V_O(D)	Bus output voltage (dominant)		CANH	TXD at 0 V, RS at 0 V, see Figure 12 and Figure 13	2.45		V_CC	V
V_O(D)	Bus output voltage (dominant)		CANL	TXD at 0 V, RS at 0 V, see Figure 12 and Figure 13	0.5		1.25	V
V_O	Bus output voltage (recessive)		CANH	TXD at 3 V, RS at 0 V, see Figure 12 and Figure 13		2.3		V
V_O	Bus output voltage (recessive)		CANL	TXD at 3 V, RS at 0 V, see Figure 12 and Figure 13		2.3		V
V_OD(D)	Differential output voltage (dominant)			TXD at 0 V, RS at 0 V, see Figure 12 and Figure 13	1.5	2	3	V
V_OD(D)	Differential output voltage (dominant)			TXD at 0 V, RS at 0 V, see Figure 13 and Figure 14	1.2	2	3	V
V_OD	Differential output voltage (recessive)			TXD at 3 V, RS at 0 V, see Figure 12 and Figure 13	–120		12	mV
V_OD	Differential output voltage (recessive)			TXD at 3 V, RS at 0 V, no load	–0.5		0.05	V
V_OC(pp)	Peak-to-peak common-mode output voltage			See Figure 21		1		V
I_IH	High-level input current		AB, EN, LBK, TXD	TXD = 2 V or EN = 2 V or LBK = 2 V or AB = 2 V	–30		30	μA
I_IL	Low-level input current		AB, EN, LBK, TXD	TXD = 0.8 V or EN = 0.8 V or LBK = 0.8 V or AB = 0.8 V	–30		30	μA
I_OS	Short-circuit output current			V_CANH = –7 V, CANL open, see Figure 26	–250			mA
				V_CANH = 12 V, CANL open, see Figure 26			1
				V_CANL = –7 V, CANH open, see Figure 26	–1
				V_CANL = 12 V, CANH open, see Figure 26			250
C_O	Output capacitance			See C_I, Input capacitance in Electrical Characteristics: Receiver
I_IRs(s)	RS input current for standby			RS at 0.75 V_CC	–10			μA
I_CC	Supply current	Sleep		EN at 0 V, TXD at V_CC, RS at 0 V or V_CC		0.05	2	μA
		Standby		RS at V_CC, TXD at V_CC, AB at 0 V, LBK at 0 V, EN at V_CC		200	600	μA
		Dominant		TXD at 0 V, no load, AB at 0 V, LBK at 0 V, RS at 0 V, EN at V_CC			6	mA
		Recessive		TXD at V_CC, no load, AB at 0 V, LBK at 0 V, RS at 0 V, EN at V_CC			6	mA
P_(AVG)	Average power dissipation			R_L = 60 Ω, R_S at 0 V, input to D a 1-MHz 50% duty cycle square wave V_CC at 3.3 V, T_A = 25°C		36.4		mW

(1) All typical values are at 25°C and with a 3.3-V supply.

8.6 Electrical Characteristics: Receiver

over operating ambient temperature range (unless otherwise noted)

PARAMETER			TEST CONDITIONS		MIN	TYP⁽¹⁾	MAX	UNIT
V_IT+	Positive-going input threshold voltage		AB at 0 V, LBK at 0 V, EN at V_CC, see Table 1			750	900	mV
V_IT–	Negative-going input threshold voltage				500	650		mV
V_hys	Hysteresis voltage (V_IT+– V_IT–)					100		mV
V_OH	High-level output voltage		I_O = –4 mA, See Figure 17		0.8 × V_CC			V
V_OL	Low-level output voltage		I_O = 4 mA, See Figure 17				0.4	V
I_I	Bus input current		CANH or CANL at 12 V	Other bus pin at 0 V, TXD at 3 V, AB at 0 V, LBK at 0 V, RS at 0 V, EN at V_CC	150		500	μA
			CANH or CANL at 12 V, V_CCat 0 V		200		600
			CANH or CANL at –7 V		–610		–150
			CANH or CANL at –7 V, V_CCat 0 V		–450		–130
C_I	Input capacitance (CANH or CANL)		Pin-to-ground, V_I = 0.4 sin (4E6πt) + 0.5 V, TXD at 3 V, AB at 0 V, LBK at 0 V, EN at V_CC			40		pF
C_ID	Differential input capacitance		Pin-to-pin, V_I = 0.4 sin (4E6πt) + 0.5 V, TXD at 3 V, AB at 0 V, LBK at 0 V, EN at V_CC			20		pF
R_ID	Differential input resistance		TXD at 3 V, AB at 0 V, LBK at 0 V, EN at V_CC		40		100	kΩ
R_IN	Input resistance (CANH or CANL) to ground		TXD at 3 V, AB at 0 V, LBK at 0 V, EN at V_CC		20		50	kΩ
I_CC	Supply current	Sleep	EN at 0 V, TXD at V_CC, RS at 0 V or V_CC			0.05	2	μA
		Standby	RS at V_CC, TXD at V_CC, AB at 0 V, LBK at 0 V, EN at V_CC			200	600	μA
		Dominant	TXD at 0 V, no load, RS at 0 V, LBK at 0 V, AB at 0 V, EN at V_CC				6	mA
		Recessive	TXD at V_CC, no load, RS at 0 V, LBK at 0 V, AB at 0 V, EN at V_CC				6	mA

(1) All typical values are at 25°C and with a 3.3-V supply.

8.7 Switching Characteristics: Driver

over operating ambient temperature range (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP⁽¹⁾	MAX	UNIT
t_PLH	Propagation delay time, low-to-high-level output	RS at 0 V, see Figure 15		35	85	ns
		RS with 10 kΩ to ground, see Figure 15		70	125
		RS with 100 kΩ to ground, see Figure 15		500	870
t_PHL	Propagation delay time, high-to-low-level output	RS at 0 V, see Figure 15		70	120	ns
		RS with 10 kΩ to ground, see Figure 15		130	180
		RS with 100 kΩ to ground, see Figure 15		870	1200
t_sk(p)	Pulse skew (\|t_PHL – t_PLH\|)	RS at 0 V, see Figure 15		35		ns
		RS with 10 kΩ to ground, see Figure 15		60
		RS with 100 kΩ to ground, see Figure 15		370
t_r	Differential output signal rise time	RS at 0 V, see Figure 15	20		70	ns
		RS with 10 kΩ to ground, see Figure 15	30		135
		RS with 100 kΩ to ground, see Figure 15	350		1400
t_f	Differential output signal fall time	RS at 0 V, see Figure 15	20		70	ns
		RS with 10 kΩ to ground, see Figure 15	30		135
		RS with 100 kΩ to ground, see Figure 15	350		1400
t_en(s)	Enable time from standby to dominant	See Figure 19 and Figure 20		0.6	1.5	μs
t_en(z)	Enable time from sleep to dominant	See Figure 19 and Figure 20		1	5	μs

(1) All typical values are at 25°C and with a 3.3-V supply.

8.8 Switching Characteristics: Receiver

over operating ambient temperature range (unless otherwise noted)

PARAMETER		TEST CONDITIONS	TYP⁽¹⁾	MAX	UNIT
t_PLH	Propagation delay time, CANH input low to RXD output high	See Figure 17	35	60	ns
t_PHL	Propagation delay time, CANH input high to RXD output low		35	60	ns
t_sk(p)	Pulse skew (\|t_PHL – t_PLH\|)		7		ns
t_r	Output signal rise time		2	5	ns
t_f	Output signal fall time		2	5	ns

(1) All typical values are at 25°C and with a 3.3-V supply.

8.9 Switching Characteristics: Device

over operating ambient temperature range (unless otherwise noted)

PARAMETER			TEST CONDITIONS	TYP⁽¹⁾	MAX	UNIT
t_(LBK)	Loopback delay, driver input to receiver output	'HVD233-Q1	See Figure 23	7.5	12	ns
t_(AB1)	Loopback delay, driver input to receiver output	'HVD235-Q1	See Figure 24	10	20	ns
t_(AB2)	Loopback delay, bus input to receiver output	'HVD235-Q1	See Figure 25	35	60	ns
t_(loop1)	Total loop delay, driver input to receiver output, recessive to dominant		RS at 0 V, see Figure 22	70	135	ns
			RS with 10 kΩ to ground, see Figure 22	105	190
			RS with 100 kΩ to ground, see Figure 22	535	1000
t_(loop2)	Total loop delay, driver input to receiver output, dominant to recessive		RS at 0 V, see Figure 22	70	135	ns
			RS with 10 kΩ to ground, see Figure 22	105	190
			RS with 100 kΩ to ground, see Figure 22	535	1000