ZHCSFS1A December 2016 – June 2018 SN65DSI84-Q1
PRODUCTION DATA.
This example configures the SN65DSI84-Q1 for the following configuration:
<aardvark>
<configure i2c="1" spi="1" gpio="0" tpower="1" pullups="1"/>
<i2c_bitrate khz="100"/>
=====SOFTRESET=======
<i2c_write addr="0x2D" count="1" radix="16"glt;09 01</i2c_writeglt;
<sleep ms="10"/>
======ADDR 0D=======
======PLL_EN(bit 0) - Enable LAST after addr 0A and 0B configured======
<i2c_write addr="0x2D" count="1" radix="16"glt;0D 00</i2c_writeglt;
<sleep ms="10"/>
======ADDR 0A=======
======HS_CLK_SRC bit0===
======LVDS_CLK_Range bit 3:1======
<i2c_write addr="0x2D" count="1" radix="16"glt;0A 05</i2c_writeglt;
<sleep ms="10"/>
======ADDR 0B=======
======DSI_CLK_DIVIDER bit7:3=====
======RefCLK multiplier(bit1:0)====== ======00 - LVDSclk=source clk, 01 - x2, 10 -x3, 11 - x4======
<i2c_write addr="0x2D" count="1" radix="16"glt;0B 28</i2c_writeglt;
<sleep ms="10"/>
======ADDR 10=======
======DSI Ch Confg Left_Right Pixels(bit7 - 0 for A ODD, B EVEN, 1 for the other config)======
======DSI Ch Mode(bit6:5) 00 - Dual, 01 - single, 10 - two single =======
======CHA_DSI_Lanes(bit4:3), CHB_DSI_Lanes(bit2:1), 00 - 4, 01 - 3, 10 - 2, 11 - 1
======SOT_ERR_TOL_DIS(bit0)=======
<i2c_write addr="0x2D" count="1" radix="16"glt;10 26</i2c_writeglt;
<sleep ms="10"/>
======ADDR 12=======
<i2c_write addr="0x2D" count="1" radix="16"glt;12 62</i2c_writeglt;
<sleep ms="10"/>
======ADDR 18=======
======bit7: DE_Pol, bit6:HS_Pol, bit5:VS_Pol, bit4: LVDS Link Cfg, bit3:CHA 24bpp, bit2: CHB 24bpp, bit1: CHA 24bpp fmt1, bit0: CHB 24bpp fmt1======
<i2c_write addr="0x2D" count="1" radix="16"glt;18 63</i2c_writeglt;
<sleep ms="10"/>
======ADDR 19=======
<i2c_write addr="0x2D" count="1" radix="16"glt;19 00</i2c_writeglt;
<sleep ms="10"/>
======ADDR 1A=======
<i2c_write addr="0x2D" count="1" radix="16"glt;1A 03</i2c_writeglt;
<sleep ms="10"/>
======ADDR 20=======
======CHA_LINE_LENGTH_LOW========
<i2c_write addr="0x2D" count="1" radix="16"glt;20 80</i2c_writeglt;
<sleep ms="10"/>
======ADDR 21=======
======CHA_LINE_LENGTH_HIGH========
<i2c_write addr="0x2D" count="1" radix="16"glt;21 07</i2c_writeglt;
<sleep ms="10"/>
======ADDR 22=======
======CHB_LINE_LENGTH_LOW========
<i2c_write addr="0x2D" count="1" radix="16"glt;22 00</i2c_writeglt;
<sleep ms="10"/>
======ADDR 23=======
======CHB_LINE_LENGTH_HIGH========
<i2c_write addr="0x2D" count="1" radix="16"glt;23 00</i2c_writeglt;
<sleep ms="10"/>
======ADDR 24=======
======CHA_VERTICAL_DISPLAY_SIZE_LOW========
<i2c_write addr="0x2D" count="1" radix="16"glt;24 00</i2c_writeglt;
<sleep ms="10"/>
======ADDR 25=======
======CHA_VERTICAL_DISPLAY_SIZE_HIGH========
<i2c_write addr="0x2D" count="1" radix="16"glt;25 00</i2c_writeglt;
<sleep ms="10"/>
======ADDR 26=======
======CHB_VERTICAL_DISPLAY_SIZE_LOW========
<i2c_write addr="0x2D" count="1" radix="16"glt;26 00</i2c_writeglt;
<sleep ms="10"/>
======ADDR 27=======
======CHB_VERTICAL_DISPLAY_SIZE_HIGH========
<i2c_write addr="0x2D" count="1" radix="16"glt;27 00</i2c_writeglt;
<sleep ms="10"/>
======ADDR 28=======
======CHA_SYNC_DELAY_LOW========
<i2c_write addr="0x2D" count="1" radix="16"glt;28 20</i2c_writeglt;
<sleep ms="10"/>
======ADDR 29=======
======CHA_SYNC_DELAY_HIGH========
<i2c_write addr="0x2D" count="1" radix="16"glt;29 00</i2c_writeglt;
<sleep ms="10"/>
======ADDR 2A=======
======CHB_SYNC_DELAY_LOW========
<i2c_write addr="0x2D" count="1" radix="16"glt;2A 00</i2c_writeglt;
<sleep ms="10"/>
======ADDR 2B=======
======CHB_SYNC_DELAY_HIGH========
<i2c_write addr="0x2D" count="1" radix="16"glt;2B 00</i2c_writeglt;
<sleep ms="10"/>
======ADDR 2C=======
======CHA_HSYNC_PULSE_WIDTH_LOW========
<i2c_write addr="0x2D" count="1" radix="16"glt;2C 32</i2c_writeglt;
<sleep ms="10"/>
======ADDR 2D=======
======CHA_HSYNC_PULSE_WIDTH_HIGH========
<i2c_write addr="0x2D" count="1" radix="16"glt;2D 00</i2c_writeglt;
<sleep ms="10"/>
======ADDR 2E=======
======CHB_HSYNC_PULSE_WIDTH_LOW========
<i2c_write addr="0x2D" count="1" radix="16"glt;2E 00</i2c_writeglt;
<sleep ms="10"/>
======ADDR 2F=======
======CHB_HSYNC_PULSE_WIDTH_HIGH========
<i2c_write addr="0x2D" count="1" radix="16"glt;2F 00</i2c_writeglt;
<sleep ms="10"/>
======ADDR 30=======
======CHA_VSYNC_PULSE_WIDTH_LOW========
<i2c_write addr="0x2D" count="1" radix="16"glt;30 05</i2c_writeglt;
<sleep ms="10"/>
======ADDR 31=======
======CHA_VSYNC_PULSE_WIDTH_HIGH========
<i2c_write addr="0x2D" count="1" radix="16"glt;31 00</i2c_writeglt;
<sleep ms="10"/>
======ADDR 32=======
======CHB_VSYNC_PULSE_WIDTH_LOW========
<i2c_write addr="0x2D" count="1" radix="16"glt;32 00</i2c_writeglt;
<sleep ms="10"/>
======ADDR 33=======
======CHB_VSYNC_PULSE_WIDTH_HIGH========
<i2c_write addr="0x2D" count="1" radix="16"glt;33 00</i2c_writeglt;
<sleep ms="10"/>
======ADDR 34=======
======CHA_HOR_BACK_PORCH========
<i2c_write addr="0x2D" count="1" radix="16"glt;34 2C</i2c_writeglt;
<sleep ms="10"/>
======ADDR 35=======
======CHB_HOR_BACK_PORCH========
<i2c_write addr="0x2D" count="1" radix="16"glt;35 00</i2c_writeglt;
<sleep ms="10"/>
======ADDR 36=======
======CHA_VER_BACK_PORCH========
<i2c_write addr="0x2D" count="1" radix="16"glt;36 00</i2c_writeglt;
<sleep ms="10"/>
======ADDR 37=======
======CHB_VER_BACK_PORCH========
<i2c_write addr="0x2D" count="1" radix="16"glt;37 00</i2c_writeglt;
<sleep ms="10"/>
======ADDR 38=======
======CHA_HOR_FRONT_PORCH========
<i2c_write addr="0x2D" count="1" radix="16"glt;38 00</i2c_writeglt;
<sleep ms="10"/>
======ADDR 39=======
======CHB_HOR_FRONT_PORCH========
<i2c_write addr="0x2D" count="1" radix="16"glt;39 00</i2c_writeglt;
<sleep ms="10"/>
======ADDR 3A=======
======CHA_VER_FRONT_PORCH========
<i2c_write addr="0x2D" count="1" radix="16"glt;3A 00</i2c_writeglt;
<sleep ms="10"/>
======ADDR 3B=======
======CHB_VER_FRONT_PORCH========
<i2c_write addr="0x2D" count="1" radix="16"glt;3B 00</i2c_writeglt;
<sleep ms="10"/>
======ADDR 3C=======
======CHA/CHB TEST PATTERN(bit4 CHA, bit0 CHB)========
<i2c_write addr="0x2D" count="1" radix="16"glt;3C 00</i2c_writeglt;
<sleep ms="10"/>
======ADDR 0D=======
======PLL_EN(bit 0) - Enable LAST after addr 0A and 0B configured======
<i2c_write addr="0x2D" count="1" radix="16"glt;0D 01</i2c_writeglt;
<sleep ms="10"/>
=====SOFTRESET=======
<i2c_write addr="0x2D" count="1" radix="16"glt;09 00</i2c_writeglt;
<sleep ms="10"/>
======write======
<i2c_write addr="0x2D" count="196" radix="16"glt;00</i2c_writeglt;
<sleep ms="10"/>
======Read======
<i2c_read addr="0x2D" count="256" radix="16"glt;00</i2c_readglt;
<sleep ms="10"/>
</aardvark>