ZHCSST5F October 1995 – February 2024 SN54AC373 , SN74AC373
PRODUCTION DATA
- 1
- 1 特性
- 2 說明
- 3 Pin Configuration and Functions
-
4 Specifications
- 4.1 Absolute Maximum Ratings
- 4.2 Recommended Operating Conditions
- 4.3 Thermal Information
- 4.4 Electrical Characteristics
- 4.5 Timing Requirements, VCC = 3.3 V ± 0.3 V
- 4.6 Timing Requirements, VCC = 5 V ± 0.5 V
- 4.7 Switching Characteristics, VCC = 3.3 V ± 0.3 V
- 4.8 Switching Characteristics, VCC = 5 V ± 0.5 V
- 4.9 Operating Characteristics
- 5 Parameter Measurement Information
- 6 Detailed Description
- 7 Application and Implementation
- 8 Device and Documentation Support
- 9 Revision History
- 10Mechanical, Packaging, and Orderable Information
封裝選項(xiàng)
請參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- W|20
- J|20
- FK|20
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
訂購信息
3 Pin Configuration and Functions
Figure 3-1 SN54AC373 J or W Package; SN74AC373 DB, DW, N, NS, or PW Package (Top
View)
Figure 3-2 SN54AC373 FK Package (Top View)Table 3-1 Pin Functions
| PIN | TYPE | DESCRIPTION | ||
|---|---|---|---|---|
| NO. | SSOP, TVSOP, SOIC, SO, or TSSOP | VQFN | ||
| 1 | OE | OE | I | Output Enable |
| 2 | 1Q | 1Q | O | 1Q Output |
| 3 | 1D | 1D | I | 1D Input |
| 4 | 2D | 2D | I | 2D Input |
| 5 | 2Q | 2Q | O | 2Q Output |
| 6 | 3Q | 3Q | O | 3Q Output |
| 7 | 3D | 3D | I | 3D Input |
| 8 | 4D | 4D | I | 4D Input |
| 9 | 4Q | 4Q | O | 4Q Output |
| 10 | GND | GND | — | Ground Pin |
| 11 | LE | LE | I | Latch Enable |
| 12 | 5Q | 5Q | O | 5Q Output |
| 13 | 5D | 5D | I | 5D Input |
| 14 | 6D | 6D | I | 6D Input |
| 15 | 6Q | 6Q | O | 6Q Output |
| 16 | 7Q | 7Q | O | 7Q Output |
| 17 | 7D | 7D | I | 7D Input |
| 18 | 8D | 8D | I | 8D Input |
| 19 | 8Q | 8Q | O | 8Q Output |
| 20 | VCC | VCC | — | Power Pin |
| — | — | Thermal Pad | — | Thermal Pad, normally tied to GND |