ZHCSF43B May 2016 – August 2016 REF6025 , REF6030 , REF6033 , REF6041 , REF6045 , REF6050
PRODUCTION DATA.
- 1 特性
- 2 應(yīng)用
- 3 說(shuō)明
- 4 修訂歷史記錄
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
- 7 Specifications
- 8 Parameter Measurement Information
- 9 Detailed Description
- 10Applications and Implementation
- 11Power Supply Recommendations
- 12Layout
- 13器件和文檔支持
- 14機(jī)械、封裝和可訂購(gòu)信息
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- DGK|8
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
訂購(gòu)信息
12 Layout
12.1 Layout Guidelines
Figure 62 illustrates an example of a PCB layout for a data-acquisition system using the REF60xx. Some key considerations are:
- Connect low-ESR, 0.1-μF ceramic bypass capacitors between the VIN pin and ground.
- Place the REF60xx output capacitor (CL) and the ADC as close to each other as possible.
- Run two separate traces between VOUT_F, VOUT_S and the output capacitor, as shown in Figure 62.
- Short the GND_F and GND_S pins with a solid plane, and extend this plane to connect to the output capacitor CL, as shown in Figure 62.
- Use a solid ground plane to help distribute heat and reduces electromagnetic interference (EMI) noise pickup.
- Place the external components as close to the device as possible. This configuration prevents parasitic errors (such as the Seebeck effect) from occurring.
- Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if possible, and only make perpendicular crossings when absolutely necessary.
12.2 Layout Example
Figure 62. Layout Example