ZHCSCT4A September 2014 – January 2017 REF1925 , REF1930 , REF1933 , REF1941
PRODUCTION DATA.
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 修訂歷史記錄
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
- 7 Specifications
- 8 Parameter Measurement Information
- 9 Detailed Description
- 10Applications and Implementation
- 11Power-Supply Recommendations
- 12Layout
- 13器件和文檔支持
- 14機(jī)械、封裝和可訂購信息
封裝選項
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- DDC|5
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
訂購信息
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| Input voltage | VIN | –0.3 | 6 | V |
| EN | –0.3 | VIN + 0.3 | ||
| Temperature | Operating | –55 | 150 | °C |
| Junction, TJ | 150 | |||
| Storage, Tstg | –65 | 170 | ||
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7.2 ESD Ratings
| VALUE | UNIT | |||
|---|---|---|---|---|
| V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±4000 | V |
| Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±1500 | |||
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)| MIN | NOM | MAX | UNIT | ||
|---|---|---|---|---|---|
| VIN | Supply input voltage range (IL = 0 mA, TA = 25°C) | VREF + 0.02(1) | 5.5 | V | |
(1) See Figure 24 in the Typical Characteristics section for the minimum input voltage at different load currents and temperature.
7.4 Thermal Information
| THERMAL METRIC(1) | REF19xx | UNIT | |
|---|---|---|---|
| DDC (SOT23) | |||
| 5 PINS | |||
| RθJA | Junction-to-ambient thermal resistance | 193.6 | °C/W |
| RθJC(top) | Junction-to-case (top) thermal resistance | 40.2 | °C/W |
| RθJB | Junction-to-board thermal resistance | 34.5 | °C/W |
| ψJT | Junction-to-top characterization parameter | 0.9 | °C/W |
| ψJB | Junction-to-board characterization parameter | 34.3 | °C/W |
| RθJC(bot) | Junction-to-case (bottom) thermal resistance | N/A | °C/W |
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.
7.5 Electrical Characteristics
At TA = 25°C, IL = 0 mA, and VIN = 5 V, unless otherwise noted. Both VREF and VBIAS have the same specifications.| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |||
|---|---|---|---|---|---|---|---|---|
| ACCURACY AND DRIFT | ||||||||
| Output voltage accuracy | –0.1% | 0.1% | ||||||
| Output voltage temperature coefficient(1) | –40°C ≤ TA ≤ 125°C | ±10 | ±25 | ppm/°C | ||||
| VREF and VBIAS tracking over temperature(2) | –40°C ≤ TA ≤ 85°C | ±1.5 | ±6 | ppm/°C | ||||
| –40°C ≤ TA ≤ 125°C | ±2 | ±7 | ||||||
| LINE AND LOAD REGULATION | ||||||||
| ΔVO(ΔVI) | Line regulation | VREF + 0.02 V ≤ VIN ≤ 5.5 V | 3 | 35 | ppm/V | |||
| ΔVO(ΔIL) | Load regulation | Sourcing | 0 mA ≤ IL ≤ 20 mA , VREF + 0.6 V ≤ VIN ≤ 5.5 V |
8 | 20 | ppm/mA | ||
| Sinking | 0 mA ≤ IL ≤ –20 mA, VREF + 0.02 V ≤ VIN ≤ 5.5 V |
8 | 20 | |||||
| POWER SUPPLY | ||||||||
| ICC | Supply current | Active mode | 360 | 430 | µA | |||
| –40°C ≤ TA ≤ 125°C | 460 | |||||||
| Shutdown mode | 3.3 | 5 | ||||||
| –40°C ≤ TA ≤ 125°C | 9 | |||||||
| Enable voltage | Device in shutdown mode (EN = 0) | 0 | 0.7 | V | ||||
| Device in active mode (EN = 1) | VIN – 0.7 | VIN | ||||||
| Dropout voltage | 10 | 20 | mV | |||||
| IL = 20 mA | 600 | |||||||
| ISC | Short-circuit current | 50 | mA | |||||
| ton | Turn-on time | 0.1% settling, CL = 1 µF | 500 | µs | ||||
| NOISE | ||||||||
| Low-frequency noise(3) | 0.1 Hz ≤ f ≤ 10 Hz | 12 | ppmPP | |||||
| Output voltage noise density | f = 100 Hz | 0.25 | ppm/√Hz | |||||
| CAPACITIVE LOAD | ||||||||
| Stable output capacitor range | 0 | 10 | µF | |||||
| HYSTERESIS AND LONG-TERM STABILITY | ||||||||
| Long-term stability | 0 to 1000 hours | 60 | ppm | |||||
| Output voltage hysteresis(4) | 25°C, –40°C, 125°C, 25°C | Cycle 1 | 60 | ppm | ||||
| Cycle 2 | 35 | |||||||
(1) Temperature drift is specified according to the box method. See the Feature Description section for more details.
(2) The VREF and VBIAS tracking over temperature specification is explained in more detail in the Feature Description section.
(3) The peak-to-peak noise measurement procedure is explained in more detail in the Noise Performance section.
(4) The thermal hysteresis measurement procedure is explained in more detail in the Thermal Hysteresis section.
7.6 Typical Characteristics
At TA = 25°C, IL = 0 mA, VIN = 5-V power supply, CL = 0 µF, and 2.5-V output, unless otherwise noted.
| –40°C ≤ TA ≤ 125°C |
Over Temperature
| Refer to the Solder Heat Shift section for more information. |
| VBIAS output |
| VBIAS output | IL = 20 mA |
| VBIAS output | IL = –20 mA |
| VBIAS output |
| CL = 10 µF |
| CL = 10 µF |
| CL = 10 µF | IL = ±1-mA step |
| CL = 10 µF | IL = ±20-mA step |
| CL = 1 µF |
| VREF output |
| VBIAS output |
| –40°C ≤ TA ≤ 85°C |
Over Temperature
| Refer to the Solder Heat Shift section for more information. |
| VREF output |
| VREF output | IL = 20 mA |
| VREF output | IL = –20 mA |
| VREF output |
| CL = 0 µF |
| CL = 1 µF |
| CL = 1 µF | IL = ±1-mA step |
| CL = 1 µF | IL = ±20-mA step |
| CL = 10 µF |
| VBIAS output |
| VREF output |
