ZHCSCB3D March 2014 – March 2018 PCM1860 , PCM1861 , PCM1862 , PCM1863 , PCM1864 , PCM1865
PRODUCTION DATA.
The PCM186x can support stereo PCM data on GPIO pins so that I2S sources, such as wireless modules can have their data mixed with the incoming analog content. The clock rate of the incoming data (known as DIN) must be synchronous with the PCM186x software-controlled device main clocks. There is no integrated sample rate converter on-chip. The DIN signal can be received on GPIO0, 1, 2, or 3, and configured on GPIO_FUNC_X (Page.0 0x10 and 0x11). The incoming data are then driven to the digital mixer running on DSP2.
The audio format can be configured separately from the output serial port using register RX_TDM_OFFSET (P0, 0x0E).
Inputs can be mixed and volume-controlled before routing to a digital amplifier. Typical uses could be the connection to a Bluetooth module. The mixing and crossfading is done all in the PCM186x, rather than a hard switch in external logic. The on-chip PLL also helps create the system master clock (SCKOUT) for poorly designed I2S Bluetooth modules that do not provide a system clock to drive the system DACs.
If the stereo PCM data source has a requirement to drive the audio clock pins when transmitting in a system where the PCM186x has not been set to slave yet, the PCM186x does not suffer any damage during clock driver contention. However, the PCM186x will have some irregular output due to clock errors. In systems with additional stereo PCM sources that need to be master (such as a S/PDIF receive), set the PCM186x to always be a clock slave, or switch the device from master to slave mode, before enabling the stereo PCM source.