ZHCSJK4G June 2009 – March 2021 PCA9548A
PRODUCTION DATA
- 1 特性
- 2 應用
- 3 說明
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Parameter Measurement Information
- 8 Detailed Description
- 9 Application Information Disclaimer
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
封裝選項
機械數據 (封裝 | 引腳)
散熱焊盤機械數據 (封裝 | 引腳)
- RGE|24
訂購信息
8.6.1 Device Address
Figure 8-4 shows the address byte of the PCA9548A.
Figure 8-4 PCA9548A AddressThe last bit of the slave address defines the operation (read or write) to be performed. When it is high (1), a read is selected, while a low (0) selects a write operation.
Table 8-1 shows the PCA9548A address reference.
Table 8-1 Address Reference
| INPUTS | I2C BUS SLAVE ADDRESS | ||
|---|---|---|---|
| A2 | A1 | A0 | |
| L | L | L | 112 (decimal), 70 (hexadecimal) |
| L | L | H | 113 (decimal), 71 (hexadecimal) |
| L | H | L | 114 (decimal), 72 (hexadecimal) |
| L | H | H | 115 (decimal), 73 (hexadecimal) |
| H | L | L | 116 (decimal), 74 (hexadecimal) |
| H | L | H | 117 (decimal), 75 (hexadecimal) |
| H | H | L | 118 (decimal), 76 (hexadecimal) |
| H | H | H | 119 (decimal), 77 (hexadecimal) |