5.5 Low-Power Mode Supply Currents (Into VCC) Excluding External Current
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)(1)(2)
| PARAMETER |
VCC |
PMMCOREVx |
–40°C |
25°C |
55°C |
85°C |
UNIT |
| TYP |
MAX |
TYP |
MAX |
TYP |
MAX |
TYP |
MAX |
| ILPM0,1MHz |
Low-power mode 0(3)(8) |
3.0 V |
2 |
86 |
98 |
86 |
98 |
86 |
98 |
86 |
98 |
µA |
| ILPM2 |
Low-power mode 2(4)(8) |
3.0 V |
2 |
8.0 |
15.6 |
8.0 |
15.6 |
8.0 |
15.6 |
8.0 |
15.6 |
µA |
| ILPM3,XT1LF |
Low-power mode 3, crystal mode(5)(8) |
3.0 V |
2 |
2.3 |
|
2.6 |
3.37 |
4.5 |
|
7.9 |
15.6 |
µA |
| ILPM3,VLO |
Low-power mode 3, VLO mode(6)(8) |
3.0 V |
2 |
1.39 |
|
1.80 |
2.30 |
2.95 |
|
6.9 |
14.6 |
µA |
| ILPM4 |
Low-power mode 4(7)(8) |
3.0 V |
2 |
1.26 |
|
1.69 |
2.2 |
3.6 |
|
6.8 |
14.5 |
µA |
(1) All inputs are tied to 0 V or to VCC. Outputs do not source or sink any current.
(2) The currents are characterized with a Micro Crystal MS1V-T1K crystal with a load capacitance of 12.5 pF. The internal and external load capacitance are chosen to closely match the required 12.5 pF.
(3) Current for watchdog timer clocked by SMCLK included. ACLK = low frequency crystal operation (XTS = 0, XT1DRIVEx = 0).
CPUOFF = 1, SCG0 = 0, SCG1 = 0, OSCOFF = 0 (LPM0), fACLK = 32768 Hz, fMCLK = 0 MHz, fSMCLK = fDCO = 1 MHz
(4) Current for watchdog timer and RTC clocked by ACLK included. ACLK = low frequency crystal operation (XTS = 0, XT1DRIVEx = 0).
CPUOFF = 1, SCG0 = 0, SCG1 = 1, OSCOFF = 0 (LPM2), fACLK = 32768 Hz, fMCLK = 0 MHz, fSMCLK = fDCO = 0 MHz, DCO setting = 1 MHz operation, DCO bias generator enabled.
(5) Current for watchdog timer and RTC clocked by ACLK included. ACLK = low frequency crystal operation (XTS = 0, XT1DRIVEx = 0).
CPUOFF = 1, SCG0 = 1, SCG1 = 1, OSCOFF = 0 (LPM3), fACLK = 32768 Hz, fMCLK = fSMCLK = fDCO = 0 MHz
(6) Current for watchdog timer and RTC clocked by ACLK included. For this condition, the VLO must be selected as the source for ACLK, MCLK, and SMCLK otherwise additional current will be drawn due to the REFO oscillator. ACLK = MCLK = SMCLK = VLO.
CPUOFF = 1, SCG0 = 1, SCG1 = 1, OSCOFF = 0 (LPM3), fACLK = fVLO, fMCLK = fSMCLK = fVLO = 0 MHz
(7) CPUOFF = 1, SCG0 = 1, SCG1 = 1, OSCOFF = 1 (LPM4), fDCO = fACLK = fMCLK = fSMCLK = 0 MHz
(8) Current for brownout included. High and low-side supervisor and monitors disabled (SVSH, SVMH, SVSL, SVML). RAM retention enabled.