SLVSGO3 December 2021 MCT8316Z-Q1
PRODUCTION DATA
The MCT8316Z-Q1 family of devices provides seven different control modes to support various commutation and control methods. The MCT8316Z-Q1 device provides a 1x PWM control mode for driving the BLDC motor in trapezoidal current-control mode. The MCT8316Z-Q1 device uses 6-step block commutation tables that are stored internally. This feature lets a three-phase BLDC motor be controlled using a single PWM sourced from a simple controller. The PWM is applied on the PWM pin and determines the output frequency and duty cycle of the half-bridges.
The MCT8316Z-Q1 family of devices supports both analog and digital hall inputs by changing mode input setting. Differential hall inputs should be connected to HPx and HNx pins (see Figure 8-3). Digital hall inputs should be connected to the HPx pins while keeping the HNx pins floating (see Figure 8-4).
The half-bridge output states are managed by the HPA, HNA, HPB, HNB, HPC and HNC pins in analog mode and HPA, HPB, HPC in digital mode which are used as state logic inputs. The state inputs are the position feedback of the BLDC motor. The 1x PWM mode usually operates with synchronous rectification (low-side MOSFET recirculation); however, the mode can be configured to use asynchronous rectification (MOSFET body diode freewheeling) as shown below
| MODE Type | MODE Pin (Hardware Variant) | Hall Configuration | Modulation | ASR and AAR Mode |
|---|---|---|---|---|
| Mode 1 | Connected to AGND | Analog Hall Input | Asynchronous | ASR and AAR Disabled |
| Mode 2 | Connected to AGND with RMODE1 | Digital Hall Input | Asynchronous | ASR and AAR Disabled |
| Mode 3 | Connected to AGND with RMODE2 | Analog Hall Input | Synchronous | ASR and AAR Disabled |
| Mode 4 | Hi-Z | Digital Hall Input | Synchronous | ASR and AAR Disabled |
| Mode 5 | Connected to AVDD with RMODE2 | Analog Hall Input | Synchronous | ASR and AAR Enabled |
| Mode 6 | Connected to AVDD with RMODE1 | Digital Hall Input | Synchronous | ASR and AAR Enabled |
| Mode 7 | Connected to AVDD |
Texas Instruments does not recommend changing the MODE pin or PWM_MODE register during operation of the power MOSFETs. Set PWM to a low level before changing the MODE pin or PWM_MODE register.