ZHCSHY8 March 2018 LP87561-Q1 , LP87562-Q1 , LP87563-Q1 , LP87564-Q1 , LP87565-Q1
PRODUCTION DATA.
Address: 0x02
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
| EN_BUCK0 | EN_PIN_CTRL0 | BUCK0_EN_PIN_SELECT[1:0] | EN_ROOF_FLOOR0 | EN_RDIS0 | BUCK0_FPWM | BUCK0_FPWM_MP | |
| Bits | Field | Type | Default | Description |
|---|---|---|---|---|
| 7 | EN_BUCK0 | R/W | X | This bit enables the BUCK0 regulator
0h = BUCK0 regulator is disabled 1h = BUCK0 regulator is enabled |
| 6 | EN_PIN_CTRL0 | R/W | X | This bit enables the EN1, EN2, EN3 pin control for the BUCK0 regulator
0h = Only the EN_BUCK0 bit controls the BUCK0 regulator 1h = EN_BUCK0 bit AND ENx pin control the BUCK0 regulator |
| 5:4 | BUCK0_EN_PIN_SELECT[1:0] | R/W | X | This bit enables the EN1, EN2, EN3 pin control for the BUCK0 regulator
0h = EN_BUCK0 bit AND EN1 pin control BUCK0 1h = EN_BUCK0 bit AND EN2 pin control BUCK0 2h = EN_BUCK0 bit AND EN3 pin control BUCK0 3h = Reserved |
| 3 | EN_ROOF_FLOOR0 | R/W | 0h | This bit enables the roof and floor control of the EN1, EN2, and EN3 pins if the EN_PIN_CTRL0 bit is set to 1h.
0h = Enable and disable (1/0) control 1h = Roof and floor (1/0) control |
| 2 | EN_RDIS0 | R/W | 1h | This bit enables the output of the discharge resistor when the BUCK0 regulator is disabled
0h = Discharge resistor disabled 1h = Discharge resistor enabled |
| 1 | BUCK0_FPWM | R/W | X | This bit forces the BUCK0 regulator to operate in PWM mode
0h = Automatic transitions between PFM and PWM modes (AUTO mode). 1h = Forced to PWM operation |
| 0 | BUCK0_FPWM_MP | R/W | X | This bit forces the BUCK0 regulator to operate always in multiphase and forced-PWM operation mode
0h = Automatic phase adding and shedding 1h = Forced to multiphase operation; two phases in the 2-phase configuration, three phases in the 3-phase configuration, and four phases in the 4-phase configuration. |