SNOSC70C April 2012 – July 2016 LMV601 , LMV602 , LMV604
PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Pin Configuration and Functions
-
6 Specifications
- 6.1 Absolute Maximum Ratings
- 6.2 ESD Ratings
- 6.3 Recommended Operating Conditions
- 6.4 Thermal Information
- 6.5 Electrical Characteristics - DC (2.7 V)
- 6.6 Electrical Characteristics - AC (2.7 V)
- 6.7 Electrical Characteristics - DC (5 V)
- 6.8 Electrical Characteristics - AC (5 V)
- 6.9 Typical Characteristics
- 7 Detailed Description
- 8 Application and Implementation
- 9 Power Supply Recommendations
- 10Layout
- 11Device and Documentation Support
- 12Mechanical, Packaging, and Orderable Information
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
訂購信息
8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
8.1 Application Information
The LMV60x family of amplifiers features low-voltage, low-power, and rail-to-rail output operational amplifiers designed for low-voltage portable applications.
8.2 Typical Application
Figure 46. Sample and Hold Circuit
8.2.1 Design Requirements
The lower input bias current of the LMV601 results in a very high input impedance. The output impedance when the device is in shutdown mode is quite high. These high impedances, and the ability of the shutdown pin to be derived from a separate power source, make LMV601 a good choice for sample and hold circuits. The sample clock must be connected to the shutdown pin of the amplifier to rapidly turn the device on or off.
8.2.2 Detailed Design Procedure
Figure 46 shows the schematic of a simple sample-and-hold circuit. When the sample clock is high, the first amplifier is in normal operation mode and the second amplifier acts as a buffer. The capacitor, which appears as a load on the first amplifier, is charging at this time. The voltage across the capacitor is that of the noninverting input of the first amplifier because it is connected as a voltage-follower. When the sample clock is low, the first amplifier is shut off, bringing the output impedance to a high value. The high impedance of this output, along with the very high impedance on the input of the second amplifier, prevents the capacitor from discharging. There is very little voltage droop while the first amplifier is in shutdown mode. The second amplifier, which is still in normal operation mode and is connected as a voltage-follower, also provides the voltage sampled on the capacitor at its output.
8.2.3 Application Curve
8.3 Dos and Don'ts
Do properly bypass the power supplies.
Do add series resistence to the output when driving capacitive loads, particularly cables, Muxes, and ADC inputs.
Do add series current-limiting resistors and external Schottky clamp diodes if input voltage is expected to exceed the supplies. Limit the current to 1 mA or less (1 kΩ per volt).