The LMR14010A SHDN pin is a high-voltage tolerant input with an internal pullup circuit. The device can be enabled even if the SHDN pin is floating. The regulator can also be turned on using 1.25-V or higher logic signals. If the use of a higher voltage is desired due to system or other constraints it can be used. TI recommends a 100-k? or larger resistor between the applied voltage and the SHDN pin to protect the device. When SHDN is pulled down to 0 V, the chip is turned off and enters the lowest shutdown current mode. In shutdown mode the supply current will be decreased to approximately 1 μA. If the shutdown function is not to be used, the SHDN pin can be tied to V_IN. The maximum voltage to the SHDN pin must not exceed 40 V.

The LMR14010A has an internal UVLO circuit to shutdown the output if the input voltage falls below an internally fixed UVLO threshold level. This makes sure that the regulator is not latched into an unknown state during low input voltage conditions. The regulator powers up when the input voltage exceeds the UVLO voltage level. If there is a requirement for a higher UVLO voltage, the SHDN can be used to adjust the input voltage UVLO by using external resistors.