ZHCSA23B September 2011 – June 2019 LMR12010
PRODUCTION DATA.
- 1 特性
- 2 應用
- 3 說明
- 4 修訂歷史記錄
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Detailed Description
- 8 Application and Implementation
- 9 Layout
- 10器件和文檔支持
- 11機械、封裝和可訂購信息
封裝選項
機械數(shù)據(jù) (封裝 | 引腳)
- DDC|6
散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)
訂購信息
8.2.1.9 Calculating Efficiency, and Junction Temperature
The complete LMR12010 DC/DC converter efficiency can be calculated in the following manner.
Or
Calculations for determining the most significant power losses are shown below. Other losses totaling less than 2% are not discussed.
Power loss (PLOSS) is the sum of two basic types of losses in the converter, switching and conduction. Conduction losses usually dominate at higher output loads, where as switching losses remain relatively fixed and dominate at lower output loads. The first step in determining the losses is to calculate the duty cycle (D).
VSW is the voltage drop across the internal NFET when it is on, and is equal to:
VD is the forward voltage drop across the Schottky diode. It can be obtained from the Electrical Characteristics. If the voltage drop across the inductor (VDCR) is accounted for, the equation becomes:
This usually gives only a minor duty cycle change, and has been omitted in the examples for simplicity.
The conduction losses in the free-wheeling Schottky diode are calculated as follows:
Often this is the single most significant power loss in the circuit. Care should be taken to choose a Schottky diode that has a low forward voltage drop.
Another significant external power loss is the conduction loss in the output inductor. The equation can be simplified to:
The LMR12010 conduction loss is mainly associated with the internal NFET:
Switching losses are also associated with the internal NFET. They occur during the switch on and off transition periods, where voltages and currents overlap resulting in power loss. The simplest means to determine this loss is to empirically measuring the rise and fall times (10% to 90%) of the switch at the switch node:
Table 1. Typical Rise And Fall Times vs Input Voltage
| VIN | TRISE | TFALL |
|---|---|---|
| 5 V | 8 ns | 4 ns |
| 10 V | 9 ns | 6 ns |
| 15 V | 10 ns | 7 ns |
Another loss is the power required for operation of the internal circuitry:
IQ is the quiescent operating current, and is typically around 1.5mA. The other operating power that needs to be calculated is that required to drive the internal NFET:
VBOOST is normally between 3 VDC and 5 VDC. The IBOOST rms current is approximately 4.25 mA. Total power losses are:
Table 2. Design Example 1
| VIN | 5 V | POUT | 2.5 W |
| VOUT | 2.5 V | PDIODE | 151 mW |
| IOUT | 1 A | PIND | 75 mW |
| VD | 0.35 V | PSWF | 53 mW |
| Freq | 3 MHz | PSWR | 53 mW |
| IQ | 1.5 mA | PCOND | 187 mW |
| TRISE | 8 ns | PQ | 7.5 mW |
| TFALL | 8 ns | PBOOST | 21 mW |
| RDSON | 330 mΩ | PLOSS | 548 mW |
| INDDCR | 75 mΩ | ||
| D | 0.568 |
η = 82%