ZHCSPF6B february 2022 – may 2023 LMQ66410 , LMQ66420 , LMQ66430
PRODUCTION DATA
- 1
- 1 特性
- 2 應用
- 3 說明
- 4 Revision History
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
- 7 Specifications
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3
Feature Description
- 8.3.1 Enable, Start-Up, and Shutdown
- 8.3.2 Adjustable Switching Frequency (with RT)
- 8.3.3 Power-Good Output Operation
- 8.3.4 Internal LDO, VCC, and VOUT/FB Input
- 8.3.5 Bootstrap Voltage and VBOOT-UVLO (BOOT Terminal)
- 8.3.6 Output Voltage Selection
- 8.3.7 Spread Spectrum
- 8.3.8 Soft Start and Recovery from Dropout
- 8.3.9 Current Limit and Short Circuit
- 8.3.10 Thermal Shutdown
- 8.3.11 Input Supply Current
- 8.4 Device Functional Modes
-
9 Application and Implementation
- 9.1 Application Information
- 9.2
Typical Application
- 9.2.1 Synchronous Buck Regulator at 400 kHz
- 9.2.2 Design Requirements
- 9.2.3 Detailed Design Procedure
- 9.2.4 Application Curves
- 9.3 Best Design Practices
- 9.4 Power Supply Recommendations
- 9.5 Layout
- 10Device and Documentation Support
- 11Mechanical, Packaging, and Orderable Information
8.4.3.3 FPWM Mode – Light Load Operation
In FPWM mode, frequency is
maintained while lightly loaded. To maintain frequency, a limited reverse
current is allowed to flow through the inductor. Reverse current is limited
by reverse current limit circuitry, see the Electrical Characteristics for reverse current
limit values.
In FPWM mode, continuous conduction (CCM) is possible even
if IOUT is less than half of
Iripple.
Figure 8-16 FPWM Mode
OperationFor all devices, in FPWM mode, frequency reduction is still available if output voltage is high enough to command minimum on time even while lightly loaded, allowing good behavior during faults that involve output being pulled up.