ZHCSFA1C June 2016 – November 2017 LMK60A0-148351 , LMK60A0-148M , LMK60E0-156257 , LMK60E2-150M
PRODUCTION DATA.
- 1 特性
- 2 應用
- 3 說明
- 4 修訂歷史記錄
- 5 Pin Configuration and Functions
-
6 Specifications
- 6.1 Absolute Maximum Ratings
- 6.2 ESD Ratings
- 6.3 Recommended Operating Conditions
- 6.4 Thermal Information
- 6.5 Electrical Characteristics - Power Supply
- 6.6 LVPECL Output Characteristics
- 6.7 LVDS Output Characteristics
- 6.8 HCSL Output Characteristics
- 6.9 OE Input Characteristics
- 6.10 Frequency Tolerance Characteristics
- 6.11 Power-On/Reset Characteristics (VDD)
- 6.12 PSRR Characteristics
- 6.13 PLL Clock Output Jitter Characteristics
- 6.14 Additional Reliability and Qualification
- 6.15 Typical Characteristics
- 7 Parameter Measurement Information
- 8 Power Supply Recommendations
- 9 Layout
- 10器件和文檔支持
- 11機械、封裝和可訂購信息
5 Pin Configuration and Functions
SIA Package
6-pin QFM
Top View
Pin Functions
| PIN | I/O | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| POWER | |||
| GND | 3 | Ground | Device ground |
| VDD | 6 | Analog | 3.3-V power supply |
| OUTPUT BLOCK | |||
| OUTP, OUTN | 4, 5 | Universal | Differential output pair (LVPECL, LVDS or HCSL). |
| DIGITAL CONTROL / INTERFACES | |||
| NC | 2 | N/A | No connect |
| OE | 1 | LVCMOS | Output enable (internal pullup). When set to low, output pair is disabled and set at high impedance. |