ZHCSLS7A December 2020 – January 2022 LMK1C1106 , LMK1C1108
PRODUCTION DATA
- 1 特性
- 2 應用
- 3 說明
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Parameter Measurement Information
- 8 Detailed Description
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
9.2.3 Application Curves
The low additive jitter of the LMK1C110x is shown in Figure 9-2.
Figure 9-3 shows the low-noise 156.25-MHz reference source with 24.8-fs RMS jitter driving the LMK1C110x, resulting in 27.3-fs RMS jitter when integrated from 12 kHz to 20 MHz at 3.3-V supply. The resultant additive jitter measured is a low 11.4-fs RMS for this configuration.
Figure 9-4 shows the low-noise 156.25-MHz reference source with 24.8-fs RMS jitter driving the LMK1C110x, resulting in 29-fs RMS jitter when integrated from 12 kHz to 20 MHz at 2.5-V supply. The resultant additive jitter measured is a low 15-fs RMS for this configuration.
Figure 9-5 shows the low-noise 156.25-MHz reference source with 24.8-fs RMS jitter driving the LMK1C110x, resulting in 34-fs RMS jitter when integrated from 12 kHz to 20 MHz at 1.8-V supply. The resultant additive jitter measured is a low 23.25-fs RMS for this configuration.
Figure 9-2 LMK1C110x Reference Phase Noise
24.8-fs (12 kHz to 20 MHz)
Figure 9-4 LMK1C110x 2.5-V Output Phase Noise
29-fs (12 kHz to 20 MHz)
Figure 9-3 LMK1C110x 3.3-V Output Phase Noise
27.3-fs (12 kHz to 20 MHz)
Figure 9-5 LMK1C110x 1.8-V Output Phase Noise
34-fs (12 kHz to 20 MHz)