5 Revision History

Changes from C Revision (May 2013) to D Revision

• Added " Ultra-Low Additive Jitter" to document titleGo
• Added, updated, or renamed the following sections: Specifications; Detailed Description; Application and Implementation; Power Supply Recommendations; Device and Documentation Support; Mechanical, Packaging, and Ordering InformationGo
• Changed Cin (typ) from 1 pF to 4 pF (based on updated test method) in Electrical Characteristics: Crystal InterfaceGo
• Added “Additive RMS Jitter, Integration Bandwidth 10 kHz to 20 MHz” parameter with 100 MHz and 156.25 MHz Test conditions, Typical values, Max values, and footnotes in Electrical Characteristics: LVPECL Outputs Go
• Added “Additive RMS Jitter, Integration Bandwidth 10 kHz to 20 MHz” parameter with 100 MHz and 156.25 MHz Test conditions, Typical values, Max values, and footnotes in Electrical Characteristics: LVDS Outputs Go
• Added footnote for V_{I_SE} parameter in the Electrical Characteristics table. Go
• Added new paragraph at end of Driving the Clock InputsGo
• Changed part number in Figure 27 and Figure 28 to "LMK00308" Go
• Changed Cin = 4 pF (typ, based on updated test method) in Crystal Interface Go
• Added Power Supply Sequencing Go

Changes from B Revision (February 2013) to C Revision

• Changed Target Applications by adding additional applications to the second and third bullets, and removing High-Speed and Serial Interfaces from first bullet.Go
• Changed V_CM text to condition for V_IH to V_CM parameter group.Go
• Deleted V_IH min value from Electrical Characteristics table.Go
• Deleted V_IL max value from Electrical Characteristics tableGo
• Added V_{I_SE} parameter and spec limits with corresponding table note to Electrical Characteristics Table.Go
• Changed third paragraph in Driving the Clock Inputs section to include CLKin* and LVCMOS text. Revised to better correspond with information in Electrical Characteristics TableGo
• Changed bypass cap text to signal attenuation text of the fourth paragraph in Driving the Clock Inputs section.Go
• Changed Single-Ended LVCMOS Input, DC Coupling with Common Mode Biasing image with revised graphic.Go
• Added text to second paragraph of Termination for AC Coupled Differential Operation to explain graphic update to Differential LVDS Operation with AC Coupling to Receivers.Go
• Changed graphic for Differential LVDS Operation, AC Coupling, No Biasing by the Receiver and updated caption.Go