9.2 Crystal Interface

The LMK00304 has an integrated crystal oscillator circuit that supports a fundamental mode, AT-cut crystal. The crystal interface is shown in Figure 28.

Figure 28. Crystal Interface

The load capacitance (C_L) is specific to the crystal, but usually on the order of 18 - 20 pF. While C_L is specified for the crystal, the OSCin input capacitance (C_IN = 4 pF typical) of the device and PCB stray capacitance (C_STRAY ~ 1~3 pF) can affect the discrete load capacitor values, C₁ and C₂.

For the parallel resonant circuit, the discrete capacitor values can be calculated as follows:

Typically, C₁ = C₂ for optimum symmetry, so Equation 1 can be rewritten in terms of C₁ only:

Finally, solve for C₁:

Electrical Characteristics provides crystal interface specifications with conditions that ensure start-up of the crystal, but it does not specify crystal power dissipation. The designer will need to ensure the crystal power dissipation does not exceed the maximum drive level specified by the crystal manufacturer. Overdriving the crystal can cause premature aging, frequency shift, and eventual failure. Drive level should be held at a sufficient level necessary to start-up and maintain steady-state operation.

The power dissipated in the crystal, P_XTAL, can be computed by:

I_RMS can be measured using a current probe (e.g. Tektronix CT-6 or equivalent) placed on the leg of the crystal connected to OSCout with the oscillation circuit active.

As shown in Figure 28, an external resistor, R_LIM, can be used to limit the crystal drive level, if necessary. If the power dissipated in the selected crystal is higher than the drive level specified for the crystal with R_LIM shorted, then a larger resistor value is mandatory to avoid overdriving the crystal. However, if the power dissipated in the crystal is less than the drive level with R_LIM shorted, then a zero value for R_LIM can be used. As a starting point, a suggested value for R_LIM is 1.5 kΩ.