ZHCSDJ6E February 2015 – June 2018 LMH1218
PRODUCTION DATA.
- 1 特性
- 2 應用
- 3 說明
- 4 修訂歷史記錄
- 5 Pin Configuration and Functions
- 6 Specifications
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3
Feature Description
- 7.3.1 Loss of Signal Detector
- 7.3.2 Continuous Time Linear Equalizer (CTLE)
- 7.3.3 2:1 Multiplexer
- 7.3.4 Clock and Data Recovery
- 7.3.5 Eye Opening Monitor (EOM)
- 7.3.6 Fast EOM
- 7.3.7 LMH1218 Device Configuration
- 7.3.8 Power-On Reset
- 7.4 Device Functional Modes
- 7.5 Programming
- 7.6 Register Maps
- 8 Application and Implementation
- 9 Power Supply Recommendations
- 10Layout
- 11器件和文檔支持
- 12機械、封裝和可訂購信息
7.3.7.8.2 SPI Daisy Chain Write Read Example
In Figure 20 and Figure 21, the following occurs at the end of the first transaction:
- Write 0x22 to register 0x01 in Device 3
- Latch the data from register 0x34 in Device 2
- Write 0x44 to register 0x76 in Device 1
Figure 20. SPI Daisy Chain Write Read First Frame Illustration 
Figure 21. SPI Daisy Chain Write Read second Frame Illustration