ZHCSKF3B April 2017 – October 2019 LMH0397
PRODUCTION DATA.
- 1 特性
- 2 應用
- 3 說明
- 4 修訂歷史記錄
- 5 說明 （續）
- 6 Pin Configuration and Functions
- 7 Specifications
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3
Feature Description
- 8.3.1 4-Level Input Pins and Thresholds
- 8.3.2 Equalizer (EQ) and Cable Driver (CD) Mode Control
- 8.3.3 Input Carrier Detect
- 8.3.4 –6-dB Splitter Mode Launch Amplitude for SDI_IO+ (EQ Mode Only)
- 8.3.5 Continuous Time Linear Equalizer (CTLE)
- 8.3.6 Clock and Data (CDR) Recovery
- 8.3.7 Internal Eye Opening Monitor (EOM)
- 8.3.8 Output Function Control
- 8.3.9 Output Driver Control
- 8.3.10 Status Indicators and Interrupts
- 8.3.11 Additional Programmability
- 8.4 Device Functional Modes
- 8.5 Register Maps
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12器件和文檔支持
- 13機械、封裝和可訂購信息
9.2.2 Cable Equalizer With Loop-Through
The LMH0397 can be configured as a cable equalizer with loop-through output. In EQ Mode, the LMH0397 takes in SDI data at the SDI_IO adaptive cable equalizer input and outputs the reclocked SDI signal at OUT0. Meanwhile, a redundant reclocked loop-through SDI signal is output on SDI_OUT for system monitoring purposes.
Figure 30 shows a typical application of an LMH0397 as a cable loop-through device. In this example, the LMH0397 provides an SDI input to the SDI FPGA. Concurrently, the equalized and reclocked SDI_IO signal is sent to the loop-through SDI_OUT cable driver output. Meanwhile, the FPGA sends post-processed SDI data out on an LMH1218 cable driver with integrated reclocker.
Figure 30. LMH0397 Cable Loop-Through Application