SNLS308G April 2009 – June 2015 LMH0384
PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Detailed Description
- 8 Application and Implementation
- 9 Power Supply Recommendations
- 10Layout
- 11Device and Documentation Support
- 12Mechanical, Packaging, and Orderable Information
6 Specifications
6.1 Absolute Maximum Ratings(1)
| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| Supply voltage | 4.0 | V | ||
| Input voltage (all inputs) | −0.3 | VCC+0.3 | V | |
| Junction temperature | 125 | °C | ||
| Storage temperature | −65 | 150 | °C | |
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 ESD Ratings
| VALUE | UNIT | |||
|---|---|---|---|---|
| V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±6500 | V |
| Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±2000 | |||
| Machine model (MM) | ±400 | |||
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 500-V HBM is possible with the necessary precautions. Pins listed as ±6500 V may actually have higher performance.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 250-V CDM is possible with the necessary precautions. Pins listed as ±2000 V may actually have higher performance.
6.3 Recommended Operating Conditions
| MIN | NOM | MAX | UNIT | ||
|---|---|---|---|---|---|
| VCC – VEE | Supply Voltage | 3.135 | 3.3 | 3.465 | V |
| Input Coupling Capacitance | 1 | µF | |||
| AEC Capacitor (Connected between AEC+ and AEC-) | 1 | µF | |||
| TA | Operating Free Air Temperature | −40 | 85 | °C | |
6.4 Thermal Information
| THERMAL METRIC(1) | LMH0384 | UNIT | |
|---|---|---|---|
| WQFN (RUM) | |||
| 16 PINS | |||
| RθJA | Junction-to-ambient thermal resistance | 40 | °C/W |
| RθJC(top) | Junction-to-case (top) thermal resistance | 6 | °C/W |
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.
6.5 DC Electrical Characteristics
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified.(1)(2)(6)(7)| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| VIH | Input Voltage High Level (Logic Inputs) | 2 | VCC | V | ||
| VIL | Input Voltage Low Level | VEE | 0.8 | V | ||
| VSDI | Input Voltage Swing (SDI, SDI) | 0 m cable length(3) | 720 | 800 | 950 | mVP−P |
| VCMIN | Input Common-Mode Voltage (SDI, SDI) | 1.75 | V | |||
| VSSP-P | Differential Output Voltage, P-P (SDO, SDO) | 100-Ω load, default values(4), see Figure 1 |
500 | 700 | 900 | mVP-P |
| VOD | Differential Output Voltage (SDO, SDO) | 250 | 350 | 450 | mV | |
| ΔVOD | Change in Magnitude of VOD for Complementary Output States (SDO, SDO) | 50 | mV | |||
| VOS | Offset Voltage (SDO, SDO) | 1.125 | 1.25 | 1.375 | V | |
| ΔVOS | Change in Magnitude of VOS for Complementary Output States (SDO, SDO) | 50 | mV | |||
| IOS | Output Short Circuit Current (SDO, SDO) | 30 | mA | |||
| MUTEREF | MUTEREF DC Voltage (floating) | 1.3 | V | |||
| MUTEREF Range | 0.8 | V | ||||
| VOH | Output Voltage High Level (CD, MISO) | IOH = -2 mA | 2.4 | V | ||
| VOL | Output Voltage Low Level (CD, MISO) | IOL = +2 mA | 0.4 | V | ||
| ICC | Supply Current | Normal operation, equalizing cable < 140m (Belden 1694A)(5) | 70 | 85 | mA | |
| Normal operation, equalizing cable > 140 m (Belden 1694A) | 90 | 110 | mA | |||
| Power save mode | 10 | 14 | mA | |||
(1) Current flow into device pins is defined as positive. Current flow out of device pins is defined as negative. All voltages are stated referenced to VEE = 0 Volts.
(2) Typical values are stated for VCC = +3.3 V and TA = +25°C.
(3) The LMH0384 can be optimized for different launch amplitudes through the SPI.
(4) The differential output voltage and offset voltage are adjustable through the SPI.
(5) The equalizer automatically shifts equalization stages at cable lengths less than 140 m (Belden 1694A) to reduce power consumption. This power savings is also achieved by setting Extended 3G Reach Mode = 1 through the SPI.
(7) Due to SMPTE naming convention, all SMPTE Engineering Documents will be numbered as a two-letter prefix and a number. Documents and references with the same root number and year are functionally identical; for example ST 424-2006 and SMPTE 424M-2006l refer to the same document.
6.6 AC Electrical Characteristics
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified (1).| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| BRMIN | Minimum Input Data Rate (SDI, SDI) | 125 | Mbps | |||
| BRMAX | Maximum Input Data Rate (SDI, SDI) | 2970 | Mbps | |||
| TJRAW | Jitter for Various Cable Lengths | 270 Mbps, Belden 1694A, 0 to 350 meters(3) |
0.2 | UI | ||
| 270 Mbps, Belden 1694A, 350 to 400 meters |
0.2 | |||||
| 1.485 Gbps, Belden 1694A, 0 to 170 meters(3) |
0.25 | |||||
| 1.485 Gbps, Belden 1694A, 170 to 200 meters |
0.3 | |||||
| 2.97 Gbps, Belden 1694A, 0-110 meters(3) |
0.3 | |||||
| 2.97 Gbps, Belden 1694A, 110 to 140 meters |
0.35 | |||||
| tr,tf | Output Rise Time, Fall Time (SDO, SDO) | 20% to 80%, 100-Ω load(2), see Figure 1 |
80 | 130 | ps | |
| Mismatch in Rise/Fall Time (SDO, SDO) | See (2) | 2 | 15 | ps | ||
| tOS | Output Overshoot (SDO, SDO) | See (2) | 1% | 5% | ||
| RLIN | Input Return Loss (SDI, SDI) | 5 MHz to 1.5 GHz(4) | 15 | dB | ||
| 1.5 GHz to 3.0 GHz(4) | 10 | dB | ||||
| RIN | Input Resistance (SDI, SDI) | single-ended | 1.3 | kΩ | ||
| CIN | Input Capacitance (SDI, SDI) | single-ended | 0.7 | pF | ||
(1) Typical values are stated for VCC = +3.3 V and TA = +25°C.
(2) Specification is ensured by characterization.
(3) Based on design and characterization data over the full range of recommended operating conditions of the device. Jitter is measured in accordance with ST RP 184, ST RP 192, and the applicable serial data transmission standard: ST 424, ST 292, or ST 259.
(4) Input return loss is dependent onboard design. The LMH0384 exceeds this specification on the SD384 evaluation board with a return loss network consisting of a 5.6 nH inductor in parallel with the 75-Ω series resistor on the input.
6.7 Timing Requirements
over operating free-air temperature range (unless otherwise noted)| MIN | TYP | MAX | UNIT | |||
|---|---|---|---|---|---|---|
| fSCK | SCK Frequency | 20 | MHz | |||
| tPH | SCK Pulse Width High | See Figure 2 and Figure 3 | 40 | % SCK period | ||
| tPL | SCK Pulse Width Low | 40 | % SCK period | |||
| tSU | MOSI Setup Time | See Figure 2 and Figure 3 | 4 | ns | ||
| tH | MOSI Hold Time | 4 | ns | |||
| tSSSU | SS Setup Time | See Figure 2 and Figure 3 | 4 | ns | ||
| tSSH | SS Hold Time | 4 | ns | |||
| tSSOF | SS Off Time | 10 | ns | |||
6.8 Switching Characteristics
over operating free-air temperature range (unless otherwise noted)| MIN | TYP | MAX | UNIT | |||
|---|---|---|---|---|---|---|
| tODZ | MISO Driven-to-Tristate Time | See Figure 3 | 15 | ns | ||
| tOZD | MISO Tristate-to-Driven Time | 15 | ns | |||
| tOD | MISO Output Delay Time | 15 | ns | |||
Figure 1. LVDS Output Voltage, Offset, and Timing Parameters
Figure 2. SPI Write
Figure 3. SPI Read
6.9 Typical Characteristics
Typical device characteristics at TA = +25°C and VDD = 3.3 V, unless otherwise noted.
Figure 4. 20-M B1694A PRBS10 2.97 Gbps
Figure 5. 100-M B1694A PRBS10 2.97 Gbps