Table 1. Gain Select Pin Function

7.3.1 LM94022/-Q1 Transfer Function Gain Selection

The LM94022/-Q1 has four selectable gains, each of which can be selected by the GS1 and GS0 input pins. The output voltage for each gain, across the complete operating temperature range is shown in Table 2. This table is the reference from which the LM94022/-Q1 accuracy specifications (listed in the Electrical Characteristics section) are determined. This table can be used, for example, in a host processor look-up table. A file containing this data is available for download at LM94022 product folder under Tools and Software.

7.4.1 Capacitive Loads

The LM94022/-Q1 handles capacitive loading well. In an extremely noisy environment, or when driving a switched sampling input on an ADC, it may be necessary to add some filtering to minimize noise coupling. Without any precautions, the LM94022/-Q1 can drive a capacitive load less than or equal to 1100 pF as shown in Figure 13. For capacitive loads greater than 1100 pF, a series resistor may be required on the output, as shown in Figure 14.

Figure 13. LM94022/-Q1 No Decoupling Required for Capacitive Loads Less than 1100 pF

Figure 14. LM94022/-Q1 With Series Resistor for Capacitive Loading Greater than 1100 pF

7.4.2 Output Voltage Shift

The LM94022/-Q1 is very linear over temperature and supply voltage range. Due to the intrinsic behavior of an NMOS/PMOS rail-to-rail buffer, a slight shift in the output can occur when the supply voltage is ramped over the operating range of the device. The location of the shift is determined by the relative levels of V_DD and V_OUT. The shift typically occurs when V_DD – V_OUT = 1 V.

This slight shift (a few mV) takes place over a wide change (approximately 200 mV) in V_DD or V_OUT. Because the shift takes place over a wide temperature change of 5°C to 20°C, V_OUT is always monotonic. The accuracy specifications in the Electrical Characteristics table already include this possible shift.

7.4.3 Selectable Gain for Optimization and in Situ Testing

The Gain Select digital inputs can be tied to the rails or can be driven from digital outputs such as microcontroller GPIO pins. In low-supply voltage applications, the ability to reduce the gain to –5.5 mV/°C allows the LM94022/-Q1 to operate over the full –50°C to 150°C range. When a larger supply voltage is present, the gain can be increased as high as –13.6 mV/°C. The larger gain is optimal for reducing the effects of noise (for example, noise coupling on the output line or quantization noise induced by an analog-to-digital converter which may be sampling the LM94022/-Q1 output).

Another application advantage of the digitally selectable gain is the ability to perform dynamic testing of the LM94022/-Q1 while it is running in a system. By toggling the logic levels of the gain select pins and monitoring the resultant change in the output voltage level, the host system can verify the functionality of the LM94022/-Q1.