The LM708x0-Q1 contains an internal high-voltage VCC bias regulator that provides the bias supply for the gate drivers for the power MOSFETs. The input voltage pin (VIN) can be connected directly to an input voltage source up to 80V. However, when the input voltage is below the VCC setpoint level, the VCC voltage tracks VIN minus a small voltage drop.

If configured for a 3.3V fixed output, the VCC bias regulator output voltage is 5V to allow connecting the BIAS pin to an external supply from 5V to 30V. Similarly, if configured for a 5V fixed output, the VCC bias regulator output voltage is 5V to allow connecting the BIAS pin to the VOUT node or an external supply from 5V to 30V. For a 12V fixed output or an adjustable output, the VCC bias regulator output voltage is 8V to allow connecting the BIAS pin to the VOUT node or an external supply from 10V to 30V.

At power up, the VCC regulator sources current into the capacitor connected to the VCC pin (if EN pin is connected to a voltage greater than 2V). When the VCC voltage exceeds 4.3V, the output is enabled and the soft-start sequence begins. The output remains active unless the VCC voltage falls below the VCC falling UVLO threshold of 4V (typical) or the EN is driven below 900mV (typical). TI recommends that a 4.7μF capacitor is connected from the VCC pin to PGND and placed as close as possible to the device pins.

Internal power dissipation of the VCC regulator can be minimized by connecting the BIAS pin to VOUT or an external supply. If the BIAS voltage is above 9.1V (typical), the input to the VCC regulator switches over from VIN to BIAS. If configured for a 3.3V fixed or a 5V fixed output, the switchover happens at 4.6V (typical). Tie the BIAS pin to AGND if it is unused. Never connect the BIAS pin to a voltage greater than 32V. If an external supply is connected to the BIAS pin to power the LM708x0-Q1, V_IN must be greater than the external bias voltage under all conditions to avoid damage to the device.

An internal 5V linear regulator generates the VDDA bias supply from the VCC bias supply. Bypass VDDA with a 100nF ceramic capacitor to achieve a low-noise internal bias rail. Normally VDDA is 5V, however when configured for a fixed 3.3V or a fixed 5V VOUT, the VDDA regulator is disabled in sleep mode while the circuitry, normally powered by the VDDA, is switched over to VOUT as the power source.