ZHCSN39A February 2020 – November 2021 LM61480 , LM61495 , LM62460
PRODUCTION DATA
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| PWM LIMITS (SW PIN) | ||||||
| tON-MIN | Minimum HS switch on time | VIN = 18 V, VSYNC/MODE = 5 V, IOUT = 2 A, RBOOT = 0 ? | 62 | 81 | ns | |
| tOFF-MIN | Minimum HS switch off time | VIN = 5 V | 70 | 103 | ns | |
| tON-MAX | Maximum switch on time | HS timeout in dropout | 6.9 | 8.9 | 11 | μs |
| START UP | ||||||
| tEN | Turn-on delay | VIN = 13.5 V, CVCC = 1 μF, time from EN high to first SW pulse if output starts at 0 V | 0.82 | 1.2 | ms | |
| tSS | Time from first SW pulse to VREF at 90%, of set point. | 1.7 | 2.2 | 2.7 | ms | |
| tW | Short circuit wait time ("hiccup" time) | 40 | ms | |||
| POWER GOOD (/RESET PIN) and OVERVOLTAGE PROTECTION | ||||||
| tRESET_FILTER | RESET edge deglitch delay | 10 | 26 | 45 | μs | |
| tRESET_ACT | RESET active time | Time FB must be valid before RESET is released. | 1.2 | 2.1 | 3.75 | ms |
| OSCILLATOR (SYNC/MODE PIN) | ||||||
| tPULSE_H | High duration needed to be recognized on SYNC/MODE pin | 100 | ns | |||
| tPULSE_L | Low duration needed to be recognized on SYNC/MODE pin | 100 | ns | |||
| tMSYNC | Time at one level needed to indicate FPWM or Auto Mode | 7 | 20 | μs | ||
| tLOCK | Time needed for clock to lock to a valid synchronization signal | RT = 39.2 k? | 4.3 | ms | ||