ZHCSN39A February 2020 – November 2021 LM61480 , LM61495 , LM62460
PRODUCTION DATA
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 Revision History
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
- 7 Specifications
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3
Feature Description
- 8.3.1 Output Voltage Selection
- 8.3.2 Enable EN Pin and Use as VIN UVLO
- 8.3.3 SYNC/MODE Uses for Synchronization
- 8.3.4 Clock Locking
- 8.3.5 Adjustable Switching Frequency
- 8.3.6 RESET Output Operation
- 8.3.7 Internal LDO, VCC UVLO, and BIAS Input
- 8.3.8 Bootstrap Voltage and VCBOOT-UVLO (CBOOT Pin)
- 8.3.9 Adjustable SW Node Slew Rate
- 8.3.10 Spread Spectrum
- 8.3.11 Soft Start and Recovery From Dropout
- 8.3.12 Overcurrent and Short Circuit Protection
- 8.3.13 Hiccup
- 8.3.14 Thermal Shutdown
- 8.4 Device Functional Modes
-
9 Application and Implementation
- 9.1 Application Information
- 9.2
Typical Application
- 9.2.1 Design Requirements
- 9.2.2
Detailed Design Procedure
- 9.2.2.1 Choosing the Switching Frequency
- 9.2.2.2 Setting the Output Voltage
- 9.2.2.3 Inductor Selection
- 9.2.2.4 Output Capacitor Selection
- 9.2.2.5 Input Capacitor Selection
- 9.2.2.6 BOOT Capacitor
- 9.2.2.7 BOOT Resistor
- 9.2.2.8 VCC
- 9.2.2.9 CFF and RFF Selection
- 9.2.2.10 RSPSP Selection
- 9.2.2.11 RT Selection
- 9.2.2.12 RMODE Selection
- 9.2.2.13 External UVLO
- 9.2.2.14 Maximum Ambient Temperature
- 9.2.3 Application Curves
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
封裝選項
機械數(shù)據(jù) (封裝 | 引腳)
- RPH|16
散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)
- RPH|16
訂購信息
8.4.3.4 Minimum On-time (High Input Voltage) Operation
The LM6x4xx continues to regulate output voltage. This is true even if the input-to-output voltage ratio requires an on-time less than the minimum on-time of the chip with a given clock setting. This is accomplished using valley current control. At all times, the compensation circuit dictates both a maximum peak inductor current and a maximum valley inductor current. If, for any reason, valley current is exceeded, the clock cycle is extended until valley current falls below that determined by the compensation circuit. If it is not operating in current limit, the maximum valley current is set above the peak inductor current. This prevents valley control from being used unless there is a failure to regulate using peak current only. If the input-voltage to output-voltage ratio is too high, even though current exceeds the peak value dictated by compensation, the high-side device cannot be turned off quickly enough to regulate output voltage. See tON_MIN in the Electrical Characteristics. As a result, the compensation circuit reduces both peak and valley current. Once a low enough current is selected by the compensation circuit, valley current matches that being commanded by the compensation circuit. Under these conditions, the low-side device is kept on and the next clock cycle is prevented from starting until inductor current drops below the desired valley current. Since on-time is fixed at its minimum value, this type of operation resembles that of a device using a COT control scheme. See Figure 8-23.
