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ZHCSKX9D May 2019 – July 2022 LM61460

PRODUCTION DATA

封裝選項

機械數(shù)據(jù) (封裝 | 引腳)

RJR|14
- MPQF507F

散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)

訂購信息

7.6 Systems Characteristics

The following values are specified by design provided that the component values in the typical application circuit are used. Limits apply over the junction temperature range of -40°C to +150°C, unless otherwise noted. Minimum and Maximum limits are derived using test, design or statistical correlation. Typical values represent the most likely parametric norm at T_J = 25°C, and are provided for reference purposes only. Unless otherwise stated the following conditions apply: V_IN = 13.5 V. VIN1 shorted to VIN2 = V_IN. V_OUT is output setting. These parameters are not tested in production.

PARAMETER		TEST CONDITIONS	MIN	TYP	UNIT
EFFICIENCY
?_{5V_2p1MHz}	Typical 2.1-MHz efficiency	V_OUT= 5 V, I_OUT= 4 A, R_BOOT= 0 ?		93%
?_{5V_2p1MHz}	Typical 2.1-MHz efficiency	V_OUT= 5 V, I_OUT= 100 μA, R_BOOT= 0 ?, R_FBT= 1 M?		73%
?_{3p3V_2p1MHz}	Typical 2.1-MHz efficiency	V_OUT= 3.3 V, I_OUT= 4 A, R_BOOT= 0 ?		91%
?_{3p3V_2p1MHz}	Typical 2.1-MHz efficiency	V_OUT= 3.3 V, I_OUT= 100 μA, R_BOOT= 0 ?, R_FBT= 1 M?		71%
?_{5V_400kHz}	Typical 400-kHz efficiency	V_OUT= 5 V, I_OUT= 4 A, R_BOOT= 0 ?		95%
?_{5V_400kHz}	Typical 400-kHz efficiency	V_OUT= 5 V, I_OUT= 100 μA, R_BOOT= 0 ?, R_FBT= 1 M?		76%
RANGE OF OPERATION
V_{VIN_MIN1}	V_IN for full functionality at reduced load, after start-up.	V_OUT set to 3.3 V	3.0		V
V_{VIN_MIN2}	V_IN for full functionality at 100% of maximum rated load, after start-up.	V_OUT set to 3.3 V	3.95		V
I_Q-VIN	Operating quiescent current⁽¹⁾	V_OUT= 3.3 V, I_OUT= 0 A, auto mode, R_FBT= 1 M?		7	μA
I_Q-VIN	Operating quiescent current⁽¹⁾	V_OUT= 5 V, I_OUT= 0 A, auto mode, R_FBT= 1 M?		10	μA
V_DROP1	Input to output voltage differential to maintain regulation accuracy without inductor DCR drop	V_OUT= 3.3 V, I_OUT = 4 A, –3% output accuracy at 25℃		0.4	V
V_DROP1		V_OUT= 3.3 V, I_OUT= 4 A, –3% output accuracy at 125℃		0.55	V
V_DROP2	Input to output voltage differential to maintain f_SW ≥ 1.85 MHz, without DCR drop	V_OUT= 3.3 V, I_OUT= 4 A, –3% regulation accuracy at 25℃		0.8	V
V_DROP2		V_OUT= 3.3 V, I_OUT= 4 A, –3% regulation accuracy at 125℃		1.2	V
D_MAX	Maximum switch duty cycle	f_SW = 1.85 MHz		87%
D_MAX	Maximum switch duty cycle	While in frequency foldback	98%
RBOOT
t_RISE	SW node rise time	R_BOOT = 0 ?, I_OUT = 2 A (10% to 80%)		2.15	ns
t_RISE	SW node rise time	R_BOOT = 100 ?, I_OUT = 2 A (10% to 80%)		2.7	ns

(1) See detailed description for the meaning of this specification and how it can be calculated.