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ZHCSEK7D June 2015 – May 2021 LM53600-Q1 , LM53601-Q1

PRODUCTION DATA

封裝選項(xiàng)

機(jī)械數(shù)據(jù) (封裝 | 引腳)

DSX|10
- MPDS565C

散熱焊盤(pán)機(jī)械數(shù)據(jù) (封裝 | 引腳)

DSX|10
- QFND662

訂購(gòu)信息

7.5 Electrical Characteristics

Limits apply to the recommended operating junction temperature range of –40°C to 150°C, unless otherwise noted. Minimum and maximum limits are ensured through test, design or statistical correlation. Typical values represent the most likely parametric norm at T_j = 25°C, and are provided for reference purposes only. Unless otherwise stated the following conditions apply: V_in = 13.5 V.

	PARAMETER	TEST CONDITIONS	MIN	TYP	MAX	UNIT
V_FB	Initial output voltage accuracy	V_in= 3.8 V to 36 V T_j=25°C, Open Loop	–1%		1%
V_FB	Initial output voltage accuracy	V_in= 3.8 V to 36 V, Open Loop	–1.5%		1.5%
I_Q	Operating quiescent current; measured at V_IN pin	V_in= 13.5 V, Not switching V_bias= 5 V		6.5		μA
I_Q	Operating quiescent current; measured at V_IN pin	V_in= 13.5 V, Not switching V_bias= 5 V, T_j= 85°C			16
I_B	Bias current into BIAS pin for adjustable versions and FB pin for fixed versions	V_in= 13.5 V, Not switching V_bias= 5 V, Mode = 0 V		46	80
I_SD	Shutdown quiescent current; measured at V_IN pin	EN = 0, VIN = 13.5 V T_j = 25°C		1.8		μA
I_SD	Shutdown quiescent current; measured at V_IN pin	EN = 0, VIN = 13.5 V T_j = 85°C			3	μA
V_{in_UVLO}	Minimum input voltage to operate	Rising	3.2	3.6	3.75	V
V_{in_UVLO _hyst}	Minimum input voltage hysteresis	Hysteresis	0.2	0.3	0.35	V
V_{reset_OV}	RESET upper threshold voltage	Rising, % of Vout	105%	106.5%	110%
V_{reset_UV}	RESET lower threshold voltage	Falling, % Vout	92%	94%	97%
V_{reset_guard}	Magnitude of RESET lower threshold difference from steady state output voltage	Steady state output voltage and RESET threshold read at the same T_J, and V_IN	3.9%
V_{reset_hyst}	RESET hysteresis as a percent of output voltage set point			1%
V_{reset_valid}	Minimum input voltage for proper RESET function	50 μA pull-up to RESET pin, EN = 0 V, T_j = 25°C			1.5	V
V_OL	Low level RESET function output voltage	50 μA pull-up to RESET pin, Vin = 1.5 V, EN = 0 V, T_j = 25°C			0.4	V
		0.5mA pull-up to RESET pin, Vin = 13.5 V, EN = 0 V			0.4
		1mA pull-up to RESET pin, Vin = 13.5 V, EN = 3.3 V			0.4
F_sw	Switching frequency	V_IN = 13.5 V, Center frequency with spread spectrum, PWM operation	1.89	2.1	2.4	MHz
		V_IN = 13.5 V, Without spread spectrum, PWM operation	1.89	2.1	2.4
		V_IN = 36 V, 3.3-V fixed output device and adjustable devices regardless of output voltage		1.0
		V_IN = 36 V, 5-V fixed output device		1.5
F_SYNC	Sync frequency range	Output setting + 1 V < V_IN < 18 V	1.9	2.1	2.3	MHz
D_SYNC	Sync input duty cycle range	High state input < 5.5 V and > 2.3 V	25%		75%
V_SYNC/MODE	SYNC/MODE input threshold voltage	SYNC/MODE input high (MODE=FPWM)	1.5			V
		SYNC/MODE input low (MODE = AUTO with diode emulation)			0.4
		SYNC/MODE input hysteresis	0.185		1
F_SSS	Frequency span of spread spectrum operation⁽²⁾			±4%
F_PSS	Spread spectrum pattern frequency⁽²⁾				30	Hz
I_SYNC/MODE	SYNC/MODE leakage current	Vin = 13.5 V, V_SYNC/MODE = 3.3 V		1		μA
I_SYNC/MODE	SYNC/MODE leakage current	V_IN = V_SYNC/MODE = 13.5 V		5		μA
t_MODE	Mode change transition time ⁽²⁾	To FPWM Mode 20 mA load, V_IN = 13.5 V		100		μs
t_MODE	Mode change transition time ⁽²⁾	To AUTO Mode 20-mA load, V_IN = 13.5 V		60		μs
I_{L_HS}	High side switch current limit ⁽¹⁾	LM53600-Q1 Duty cycle approaches 0%	1.0	1.35	1.65	A
I_{L_HS}	High side switch current limit ⁽¹⁾	LM53601-Q1 Duty cycle approaches 0%	1.5	1.83	2.1	A
I_{L_LS}	Low side switch current limit	LM53600-Q1	0.65	0.78	0.93	A
I_{L_LS}	Low side switch current limit	LM53601-Q1	1.0	1.2	1.43	A
I_{L_ZC}	Zero-cross current limit MODE/SYNC = Low			–0.01		A
I_{L_NEG}	Negative current limit MODE/SYNC = High	LM53600-Q1		–0.7		A
I_{L_NEG}	Negative current limit MODE/SYNC = High	LM53601-Q1		–0.7		A
R_dson	Power switch on-resistance	High side MOSFET Rdson		220		mΩ
R_dson	Power switch on-resistance	Low side MOSFET Rdson		200		mΩ
V_EN	Enable input threshold voltage - rising	Enable rising	1.7	-	2.0	V
V_{EN_HYST}	Enable threshold hysteresis		0.40	-	0.55	V
V_{EN_WAKE}	Enable Wake-up threshold		0.4			V
I_EN	Enable pin input current	V_IN = V_EN = 13.5 V		2.7		μA
V_cc	Internal Vcc voltage	V_IN = 13.5 V, V_bias= 0 V		3.05		V
V_cc	Internal Vcc voltage	V_IN = 13.5 V, V_bias= 3.3 V		3.15		V
V_{cc_UVLO}	Internal Vcc input under voltage lock-out	VCC rising		2.7		V
V_{cc_UVLO_hyst}	Input under voltage lock-out hysteresis	Hysteresis below V_{cc_uvlo}		190		mV
I_FB	Input current from FB to AGND	LM53600-Q1-ADJ, FB = 1 V		20		nA
V_ref	Reference voltage for ADJ option only	T_j = 25°C	0.993	1	1.007	V
V_ref	Reference voltage for ADJ option only		0.985	1	1.015	V
R_RESET	Rdson of RESET output			50	120	Ω
T_SD	Thermal shutdown rising threshold⁽²⁾		151	167	185	°C
T_SDF	Thermal shutdown falling threshold⁽²⁾		140	157
T_{SD_hyst}	Thermal shutdown hysteresis⁽²⁾			10
D_max	Maximum switch duty cycle⁽²⁾	Fsw = 2.1 MHz		76%
D_max	Maximum switch duty cycle⁽²⁾	While in frequency fold back	96%

(1) High side current limit is a function of duty factor. Current limit value is highest at small duty factor and less at higher duty factors.

(2) Ensured by design, statistical analysis and production testing of correlated parameters; not tested in production.