ZHCSCY3E October 2014 – October 2018 LM5160 , LM5160A
PRODUCTION DATA.
| PIN | I/O(1) | DESCRIPTION | |
|---|---|---|---|
| NO. | NAME | ||
| 1 | AGND | — | Analog Ground. Ground connection of internal control circuits. |
| 2 | PGND | P | Power Ground. Ground connection of the internal synchronous rectifier FET. |
| 3 | VIN | P | Input supply connection. Operating input range is 4.5 V to 65 V. |
| 4 | EN/UVLO | I | Precision enable. Input pin of undervoltage lockout (UVLO) comparator. |
| 5 | RON | I | On-time programming pin. A resistor between this pin and VIN sets the switch on-time as a function of input voltage. |
| 6 | SS | I | Soft start. Connect a capacitor from SS to AGND to control output rise time and limit overshoot. |
| 7 | FPWM | I | Forced PWM logic input pin. Connect to AGND for discontinuous conduction mode (DCM) with light loads. Connect to VCC for continuous conduction mode (CCM) at all loads and Fly-Buck configuration. |
| 8 | FB | I | Feedback input of voltage regulation comparator. |
| 9 | VCC | O | Internal high voltage start-up regulator bypass capacitor pin. |
| 10 | BST | P | Bootstrap capacitor pin. Connect a capacitor between BST and SW to bias gate driver of high-side buck FET. |
| 11,12 | SW | P | Switch node. Source connection of high-side buck FET and drain connection of low-side synchronous rectifier FET. |
| — | NC | — | No Connection. |
| — | EP | — | Exposed Pad. Connect to AGND and printed-circuit board ground plane to improve power dissipation. |