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ZHCSDV5C July 2015 – October 2018 LM5160-Q1

PRODUCTION DATA.

封裝選項

機械數(shù)據(jù) (封裝 | 引腳)

PWP|14
- MPDS370A

散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)

PWP|14
- PPTD287A

訂購信息

6.5 Electrical Characteristics

Typical values correspond to T_J= 25°C. Minimum and maximum limits apply over T_J = –40°C to 125°C. Unless otherwise stated, V_IN = 24 V.⁽¹⁾⁽²⁾

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
SUPPLY CURRENT
I_SD	Input shutdown current	V_IN = 24 V, V_EN/UVLO = 0 V		50	90.7	µA
I_OP	Input operating current	V_IN = 24 V, V_FB = 3 V, non-switching		2.3	2.84	mA
VCC SUPPLY
V_CC	Bias regulator output	V_IN = 24 V, I_CC = 20 mA	6.47	7.5	8.52	V
V_CC	Bias regulator current limit	V_IN = 24 V	30			mA
V_CC(UV)	VCC undervoltage threshold	V_VCC rising		3.98	4.1	V
V_CC(HYS)	VCC undervoltage hysteresis	V_VCC falling		185		mV
V_CC(LDO)	VIN – VCC dropout voltage	V_IN = 4.5 V, I_VCC = 20 mA		165	260	mV
HIGH-SIDE FET
R_DS(ON)	High-side on-state resistance	V_BST– V_SW = 7 V, I_SW = 1 A		0.29		Ω
BST_(UV)	Bootstrap gate drive UV	V_BST– V_SW rising		2.93	3.6	V
BST_(HYS)	Gate drive UV hysteresis	V_BST– V_SW falling		200		mV
LOW-SIDE FET
R_DS(ON)	Low-side on-state resistance	I_SW = 1 A		0.13		Ω
HIGH-SIDE CURRENT LIMIT
I_LIM_(HS)	High-side current limit threshold		2.125	2.5	2.875	A
T_RES	Current limit response time	I_LIM_(HS) threshold detect to FET turnoff		100		ns
T_OFF1	Current limit forced off-time	V_FB = 0 V, V_IN = 65 V	16	29	39.8	µs
T_OFF2	Current limit forced off-time	V_FB = 1 V, V_IN = 24 V	2.18	3.5	5.12	µs
LOW-SIDE CURRENT LIMIT
I_SOURCE(LS)	Sourcing current limit		1.9	2.5	3	A
I_SINK(LS)	Sinking current limit			5.4		A
DIODE EMULATION
V_FPWM(LOW)	FPWM input logic low	V_IN = 24 V			1	V
V_FPWM(HIGH)	FPWM input logic high	V_IN = 24 V	3			V
I_ZX	Zero cross detect current	FPWM = AGND (diode emulation)		0		mA
REGULATION COMPARATOR
V_REF	FB regulation level	V_IN = 24 V	1.975	1.995	2.015	V
I_(Bias)	FB input bias current	V_IN = 24 V			100	nA
ERROR CORRECTION AMPLIFIER and SOFT START
G_M	Error amp transconductance	V_FB = V_REF ± 10 mV		105		µA/V
I_EA(Source)	Error amp source current	V_FB = 1 V, V_SS = 1 V	7.62	10.2	12.51	µA
I_EA(Sink)	Error amp sink current	V_FB = 5 V, V_SS = 2.25 V	7.46	10	12.2	µA
V_(SS-FB)	V_SS – V_FB clamp voltage	V_FB = 1.75 V, C_SS= 1 nF		135		mV
I_SS	Soft-start charging current	V_SS = 0.5 V	7.63	10.2	12.5	µA
ENABLE/UVLO
V_UVLO_(TH)	UVLO threshold	V_EN/UVLO rising	1.213	1.24	1.277	V
I_UVLO(HYS)	UVLO hysteresis current	V_EN/UVLO = 1.4 V	15	20	25	µA
V_SD(TH)	Shutdown mode threshold	V_EN/UVLO falling	0.28	0.35		V
V_SD(HYS)	Shutdown threshold hysteresis	V_EN/UVLO rising		47		mV
THERMAL SHUTDOWN
T_SD	Thermal shutdown threshold			175		°C
T_SD(HYS)	Thermal shutdown hysteresis			20		°C

(1) All minimum and maximum limits are specified by correlating the electrical characteristics to process and temperature variations and applying statistical process control.

(2) The junction temperature (T_J in °C) is calculated from the ambient temperature (T_Ain °C) and power dissipation (P_D in Watts) as follows: T_J = T_A + (P_D • R_θJA) where R_θJA (in °C/W) is the package thermal impedance provided in Thermal Information.