ZHCSM05 June 2020 LM51561H-Q1 , LM5156H-Q1
PRODUCTION DATA
- 1 特性
- 2 應用
- 3 說明
- 4 Revision History
- 5 說明（續）
- 6 Device Comparison Table
- 7 Pin Configuration and Functions
- 8 Specifications
-
9 Detailed Description
- 9.1 Overview
- 9.2 Functional Block Diagram
- 9.3
Feature Description
- 9.3.1 Line Undervoltage Lockout (UVLO/SYNC/EN Pin)
- 9.3.2 High Voltage VCC Regulator (BIAS, VCC Pin)
- 9.3.3 Soft Start (SS Pin)
- 9.3.4 Switching Frequency (RT Pin)
- 9.3.5 Dual Random Spread Spectrum (DRSS)
- 9.3.6 Clock Synchronization (UVLO/SYNC/EN Pin)
- 9.3.7 Current Sense and Slope Compensation (CS Pin)
- 9.3.8 Current Limit and Minimum On-time (CS Pin)
- 9.3.9 Feedback and Error Amplifier (FB, COMP Pin)
- 9.3.10 Power-Good Indicator (PGOOD Pin)
- 9.3.11 Hiccup Mode Overload Protection (LM51561H-Q1 Only)
- 9.3.12 Maximum Duty Cycle Limit and Minimum Input Supply Voltage
- 9.3.13 MOSFET Driver (GATE Pin)
- 9.3.14 Overvoltage Protection (OVP)
- 9.3.15 Thermal Shutdown (TSD)
- 9.4 Device Functional Modes
- 10Application and Implementation
- 11Power Supply Recommendations
- 12Layout
- 13Device and Documentation Support
- 14Mechanical, Packaging, and Orderable Information
9.3.11 Hiccup Mode Overload Protection (LM51561H-Q1 Only)
To further protect the converter during prolonged current limit conditions, the LM51561H-Q1 device option provides a hiccup mode overload protection. The internal hiccup mode fault timer of the device counts the PWM clock cycles when the cycle-by-cycle current limiting occurs after soft-start is finished. When the hiccup mode fault timer detects 64 cycles of current limiting, an internal hiccup mode off timer forces the device to stop switching and pulls down SS. Then, the device will restart after 32,768 cycles of hiccup mode off-time. The 64 cycle hiccup mode fault timer is reset if eight consecutive switching cycles occur without exceeding the current limit threshold. The soft-start time must be long enough not to trigger the hiccup mode protection after the soft-start is finished.
Figure 9-21 Hiccup Mode Overload ProtectionTo avoid an unexpected hiccup mode operation during a harsh load transient condition, it is recommended to have more margin when programming the peak-current limit.