ZHCSA24H February 2013 – June 2017 LM5122
PRODUCTION DATA.
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 修訂歷史記錄
- 5 Pin Configuration and Functions
- 6 Specifications
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3
Feature Description
- 7.3.1 Undervoltage Lockout (UVLO)
- 7.3.2 High Voltage VCC Regulator
- 7.3.3 Oscillator
- 7.3.4 Slope Compensation
- 7.3.5 Error Amplifier
- 7.3.6 PWM Comparator
- 7.3.7 Soft-Start
- 7.3.8 HO and LO Drivers
- 7.3.9 Bypass Operation (VOUT = VIN)
- 7.3.10 Cycle-by-Cycle Current Limit
- 7.3.11 Clock Synchronization
- 7.3.12 Maximum Duty Cycle
- 7.3.13 Thermal Protection
- 7.4 Device Functional Modes
-
8 Application and Implementation
- 8.1
Application Information
- 8.1.1 Feedback Compensation
- 8.1.2 Sub-Harmonic Oscillation
- 8.1.3 Interleaved Boost Configuration
- 8.1.4 DCR Sensing
- 8.1.5 Output Overvoltage Protection
- 8.1.6 SEPIC Converter Simplified Schematic
- 8.1.7 Non-Isolated Synchronous Flyback Converter Simplified Schematic
- 8.1.8 Negative to Positive Conversion
- 8.2
Typical Application
- 8.2.1 Design Requirements
- 8.2.2
Detailed Design Procedure
- 8.2.2.1 Custom Design With WEBENCH® Tools
- 8.2.2.2 Timing Resistor RT
- 8.2.2.3 UVLO Divider RUV2, RUV1
- 8.2.2.4 Input Inductor LIN
- 8.2.2.5 Current Sense Resistor RS
- 8.2.2.6 Current Sense Filter RCSFP, RCSFN, CCS
- 8.2.2.7 Slope Compensation Resistor RSLOPE
- 8.2.2.8 Output Capacitor COUT
- 8.2.2.9 Input Capacitor CIN
- 8.2.2.10 VIN Filter RVIN, CVIN
- 8.2.2.11 Bootstrap Capacitor CBST and Boost Diode DBST
- 8.2.2.12 VCC Capacitor CVCC
- 8.2.2.13 Output Voltage Divider RFB1, RFB2
- 8.2.2.14 Soft-Start Capacitor CSS
- 8.2.2.15 Restart Capacitor CRES
- 8.2.2.16 Low-Side Power Switch QL
- 8.2.2.17 High-Side Power Switch QH and Additional Parallel Schottky Diode
- 8.2.2.18 Snubber Components
- 8.2.2.19 Loop Compensation Components CCOMP, RCOMP, CHF
- 8.2.3 Application Curves
- 8.1
Application Information
- 9 Power Supply Recommendations
- 10Layout
- 11器件和文檔支持
- 12機(jī)械、封裝和可訂購信息
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
訂購信息
10 Layout
10.1 Layout Guidelines
In a boost regulator, the primary switching loop consists of the output capacitor and N-channel MOSFET power switches. Minimizing the area of this loop reduces the stray inductance and minimizes noise. Especially, placing high quality ceramic output capacitors as close to this loop earlier than bulk aluminum output capacitors minimizes output voltage ripple and ripple current of the aluminum capacitors.
In order to prevent a dv/dt induced turn-on of high-side switch, connect HO and SW to the gate and source of the high-side synchronous N-channel MOSFET switch through short and low inductance paths. In FPWM mode, the dv/dt induced turnon can occur on the low-side switch. Connect LO and PGND to the gate and source of the low-side N-channel MOSFET, through short and low inductance paths. All of the power ground connections must be connected to a single point. Also, all of the noise sensitive low power ground connections must be connected together near the AGND pin, and a single connection must be made to the single point PGND. CSP and CSN are high-impedance pins and noise sensitive. Route CSP and CSN traces together with kelvin connections to the current sense resistor as short as possible. If needed, place 100-pF ceramic filter capacitor close to the device. MODE pin is also high impedance and noise sensitive. If an external pullup or pulldown resistor is used at MODE pin, place the resistor close to the device. VCC, VIN and BST capacitor must be as physically close as possible to the device.
The LM5122 has an exposed thermal pad to aid power dissipation. Adding several vias under the exposed pad helps conduct heat away from the device. The junction to ambient thermal resistance varies with application. The most significant variables are the area of copper in the PC board, the number of vias under the exposed pad and the amount of forced air cooling. The integrity of the solder connection from the device exposed pad to the PC board is critical. Excessive voids greatly decrease the thermal dissipation capacity. The highest power dissipating components are the two power switches. Selecting N-channel MOSFET switches with exposed pads aids the power dissipation of these devices.
10.2 Layout Example
Figure 49. Power Path Layout