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ZHCSCD8C April 2014 – April 2019 LM46002

PRODUCTION DATA.

封裝選項

請參考 PDF 數據表獲取器件具體的封裝圖。

機械數據 (封裝 | 引腳)

PWP|16

散熱焊盤機械數據 (封裝 | 引腳)

訂購信息

6.5 Electrical Characteristics

Limits apply over the recommended operating junction temperature (T_J) range of –40°C to +125°C, unless otherwise stated. Minimum and Maximum limits are specified through test, design or statistical correlation. Typical values represent the most likely parametric norm at T_J = 25°C, and are provided for reference purposes only. Unless otherwise stated, the following conditions apply: V_IN = 24 V, V_OUT = 3.3 V, F_S = 500 kHz.

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
SUPPLY VOLTAGE (VIN PINS)
I_SHDNV_IN-MIN-ST	Minimum input voltage for start-up				3.8	V
	Shutdown quiescent current	V_EN = 0 V		2.3	5	µA
I_Q-NONSW	Operating quiescent current (non-switching) from V_IN	V_EN = 3.3 V V_FB= 1.5 V V_BIAS = 3.4 V external		7	12	µA
I_BIAS-NONSW	Operating quiescent current (non-switching) from external V_BIAS	V_EN = 3.3 V V_FB= 1.5 V V_BIAS = 3.4 V external		87	135	µA
I_Q-SW	Operating quiescent current (switching)	V_EN = V_IN I_OUT= 0 A R_T = open V_BIAS = V_OUT= 3.3 V R_FBT = 1 Meg		27		µA
ENABLE (EN PIN)
V_EN-VCC-H	Voltage level to enable the internal LDO output V_CC	V_ENABLEhigh level	1.2			V
V_EN-VCC-L	Voltage level to disable the internal LDO output V_CC	V_ENABLE low level			0.4	V
V_EN-VOUT-H	Precision enable level for switching and regulator output: V_OUT	V_ENABLE high level	2	2.1	2.42	V
V_EN-VOUT-HYS	Hysteresis voltage between V_OUT precision enable and disable thresholds	V_ENABLE hysteresis		–294		mV
I_LKG-EN	Enable input leakage current	V_EN = 3.3 V		0.8	1.7	µA
INTERNAL LDO (VCC PIN AND BIAS PIN)
V_CC	Internal LDO output voltage V_CC	V_IN ≥ 3.8 V		3.2		V
V_CC-UVLO	Undervoltage lockout (UVLO) thresholds for V_CC	V_CC rising threshold		3.15		V
V_CC-UVLO	Undervoltage lockout (UVLO) thresholds for V_CC	Hysteresis voltage between rising and falling thresholds		–575		mV
V_BIAS-ON	Internal LDO input change over threshold to BIAS	V_BIAS rising threshold		2.94	3.15	V
V_BIAS-ON	Internal LDO input change over threshold to BIAS	Hysteresis voltage between rising and falling thresholds		–67		mV
VOLTAGE REFERENCE (FB PIN)
V_FB	Feedback voltage	T_J = 25°C	1.004	1.011	1.018	V
V_FB	Feedback voltage	T_J = –40°C to 125°C	0.994	1.011	1.030	V
I_LKG-FB	Input leakage current at FB pin	FB = 1.011 V		0.2	65	nA
THERMAL SHUTDOWN
T_SD⁽¹⁾	Thermal shutdown	Shutdown threshold		160		°C
T_SD⁽¹⁾	Thermal shutdown	Recovery threshold		150		°C
CURRENT LIMIT AND HICCUP
I_HS-LIMIT	Peak inductor current limit		3.6	4.5	5	A
I_LS-LIMIT	Valley inductor current limit		1.8	2.05	2.3	A
SOFT START (SS/TRK PIN)
I_SSC	Soft-start charge current		1.17	2	2.75	µA
R_SSD	Soft-start discharge resistance	UVLO, TSD, OCP, or EN = 0 V		16		kΩ
POWER GOOD (PGOOD PIN)
V_PGOOD-HIGH	Power-good flag overvoltage tripping threshold	% of FB voltage		110%	113%
V_PGOOD-LOW	Power-good flag undervoltage tripping threshold	% of FB voltage	80%	88%
V_PGOOD-HYS	Power-good flag recovery hysteresis	% of FB voltage		6%
R_PGOOD	PGOOD pin pulldown resistance when power bad	V_EN = 3.3 V		69	150	Ω
R_PGOOD	PGOOD pin pulldown resistance when power bad	V_EN = 0 V		150	350	Ω
MOSFETS⁽²⁾
R_DS-ON-HS	High-side MOSFET ON-resistance	I_OUT = 1 A V_BIAS = V_OUT = 3.3 V		210		mΩ
R_DS-ON-LS	Low-side MOSFET ON-resistance	I_OUT = 1 A V_BIAS = V_OUT = 3.3 V		110		mΩ

(1) Ensured by design. Not production tested.

(2) Measured at package pins.