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ZHCSE17B July 2015 – November 2017 LM43601-Q1

PRODUCTION DATA.

封裝選項

機械數據 (封裝 | 引腳)

PWP|16
- MPDS371C

散熱焊盤機械數據 (封裝 | 引腳)

訂購信息

8.2 Typical Applications

The LM43601-Q1 only requires a few external components to convert from a wide range of supply voltage to output voltage. Figure 44 shows a basic schematic when BIAS is connected to V_OUT. This is recommended for V_OUT ≥ 3.3 V. For V_OUT< 3.3 V, connect BIAS to ground, as shown in Figure 45.

Figure 44. LM43601-Q1 Basic Schematic for
V_OUT ≥ 3.3 V, Tie BIAS to V_OUT

Figure 45. LM43601-Q1 Basic Schematic for
V_OUT< 3.3 V, Tie BIAS to Ground

The LM43601-Q1 also integrates a full list of optional features to aid system design requirements, such as precision enable, V_CC UVLO, programmable soft start, output voltage tracking, programmable switching frequency, clock synchronization and power-good indication. Each application can select the features for a more comprehensive design. A schematic with all features utilized is shown in Figure 46.

Figure 46. LM43601-Q1 Schematic with All Features

The external components must be chosen for the application, but also the stability criteria of the device control loop. The LM43601-Q1 is optimized to work within a range of external components. The inductance and capacitance of the LC output filter must considered in conjunction, creating a double pole, responsible for the corner frequency of the converter. Table 2 can be used to simplify the output filter component selection.

Table 2. L, C_OUT, and C_FF Typical Values

F_S (kHz)	L (µH)	C_OUT (µF) ⁽¹⁾	C_FF (pF) ⁽²⁾⁽³⁾	R_T (kΩ)	R_FBB (kΩ) ⁽²⁾⁽³⁾
V_OUT = 1 V
200	18	500	none	200	100
500	6.8	330	none	80.6 or open	100
1000	3.3	180	none	39.2	100
2200	1.5	100	none	17.8	100
V_OUT = 3.3 V
200	47	220	44	200	442
500	18	100	33	80.6 or open	442
1000	10	47	18	39.2	442
2200	4.7	27	12	17.8	442
V_OUT = 5 V
200	56	150	68	200	255
500	27	66	33	80.6 or open	255
1000	15	33	22	39.2	255
2200	6.8	22	18	17.8	255
V_OUT = 12 V
200	100	33	see note ⁽⁴⁾	200	90.9
500	47	22	47	80.6 or open	90.9
1000	22	15	33	39.2	90.9

(1) All the C_OUT values are after derating. Add more when using ceramics

(2) R_FBT = 0 Ω for V_OUT = 1 V. R_FBT = 1 MΩ for all other V_OUT settings.

(3) For designs with R_FBT other than 1 MΩ, adjust C_FF such that (C_FF × R_FBT) is unchanged and adjust R_FBB such that (R_FBT / R_FBB) is unchanged.

(4) High ESR C_OUT gives enough phase boost, and C_FF not needed.