ZHCSIT8 September 2018 LM2734-Q1
PRODUCTION DATA.
When planning layout there are a few things to consider when trying to achieve a clean, regulated output. The most important consideration when completing the layout is the close coupling of the GND connections of the CIN capacitor and the catch diode D1. These ground ends should be close to one another and be connected to the GND plane with at least two through-holes. Place these components as close to the IC as possible. Next in importance is the location of the GND connection of the COUT capacitor, which should be near the GND connections of CIN and D1.
There should be a continuous ground plane on the bottom layer of a two-layer board except under the switching node island.
The FB pin is a high-impedance node — take care to make the FB trace short to avoid noise pickup and inaccurate regulation. The feedback resistors should be placed as close as possible to the IC, with the GND of R2 placed as close as possible to the GND of the IC. The VOUT trace to R1 should be routed away from the inductor and any other traces that are switching.
High AC currents flow through the VIN, SW and VOUT traces, so they should be as short and wide as possible. However, making the traces wide increases radiated noise, so the designer must make this trade-off. Radiated noise can be decreased by choosing a shielded inductor.
The remaining components should also be placed as close as possible to the IC. See Application Note AN-1229 (SNVA054) for further considerations and the LM2734-Q1 demo board as an example of a four-layer layout.