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SLVS569F January 2005 – August 2015 LM2575

PRODUCTION DATA.

封裝選項

請參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。

機械數(shù)據(jù) (封裝 | 引腳)

N|16

散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)

訂購信息

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

		MIN	MAX	UNIT
V_IN	Supply voltage	–0.3	42	V
	ON/OFF pin input voltage	–0.3	V_IN	V
	Output voltage to GND (steady-state)		–1	V
T_J	Maximum junction temperature		150	°C
T_stg	Storage temperature	–65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins⁽¹⁾	±2000	V
V_(ESD)	Electrostatic discharge	Charged-device model (CDM), per JEDEC specification JESD22-C101, all pins⁽²⁾	±1000	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

			MIN	MAX	UNIT
V_IN	Supply voltage		4.75	40	V
T_J	Operating virtual junction temperature		–40	125	°C

6.4 Thermal Information

THERMAL METRIC⁽¹⁾		LM2575	UNIT
		N (PDIP)
		16 PINS
R_θJA	Junction-to-ambient thermal resistance	67	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	51	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

I_LOAD = 200 mA, V_IN = 12 V (unless otherwise noted) (see Figure 16)

PARAMETER		TEST CONDITIONS	T_J	MIN	TYP	MAX	UNIT
V_OUT	Feedback voltage	V_OUT = 5 V, I_LOAD = 0.2 A	25°C	1.217	1.23	1.243	V
		8 V ≤ V_IN ≤ 40 V, V_OUT = 5 V, 0.2 A ≤ I_LOAD ≤ 1 A	25°C	1.193	1.23	1.267
		8 V ≤ V_IN ≤ 40 V, V_OUT = 5 V, 0.2 A ≤ I_LOAD ≤ 1 A	Full range	1.18		1.28
η	Efficiency	V_IN = 12 V, V_OUT = 5 V, I_LOAD = 1 A	25°C		77%
I_IB	Feedback bias current	V_OUT = 5 V	25°C		50	100	nA
I_IB	Feedback bias current	V_OUT = 5 V	Full range			500	nA
f_o	Oscillator frequency⁽¹⁾		25°C	47	52	58	kHz
f_o	Oscillator frequency⁽¹⁾		Full range	42		63	kHz
V_SAT	Saturation voltage	I_OUT = 1 A⁽²⁾	25°C		0.9	1.2	V
V_SAT	Saturation voltage	I_OUT = 1 A⁽²⁾	Full range			1.4	V
	Maximum duty cycle⁽³⁾		25°C	93%	98%
I_CL	Peak current⁽¹⁾⁽²⁾		25°C	1.7	2.8	3.6	A
I_CL	Peak current⁽¹⁾⁽²⁾		Full range	1.3		4	A
I_L	Output leakage current	V_IN = 40⁽⁴⁾, Output = 0 V	25°C			2	mA
I_L	Output leakage current	V_IN = 40⁽⁴⁾, Output = –1 V	25°C		7.5	30	mA
I_Q	Quiescent current⁽⁴⁾		25°C		5	10	mA
I_STBY	Standby quiescent current	OFF (ON/OFF pin = 5 V)	25°C		50	200	μA
V_IH	ON/OFF logic input level	OFF (V_OUT = 0 V)	25°C	2.2	1.4		V
V_IH		OFF (V_OUT = 0 V)	Full range	2.4
V_IL		ON (V_OUT = nominal voltage)	25°C		1.2	1
V_IL		ON (V_OUT = nominal voltage)	Full range			0.8
I_IH	ON/OFF input current	OFF (ON/OFF pin = 5 V)	25°C		12	30	μA
I_IL	ON/OFF input current	ON (ON/OFF pin = 0 V)	25°C		0	10	μA

(1) In the event of an output short or an overload condition, self-protection features lower the oscillator frequency to ∼18 kHz and the minimum duty cycle from 5% to ∼2%. The resulting output voltage drops to ∼40% of its nominal value, causing the average power dissipated by the IC to lower.

(2) Output is not connected to diode, inductor, or capacitor. Output is sourcing current.

(3) Feedback is disconnected from output and connected to 0 V.

(4) To force the output transistor off, FEEDBACK is disconnected from output and connected to 12 V.