These components configure the error amplifier gain characteristics to accomplish a stable overall loop gain. One advantage of current mode control is the ability to close the loop with only two feedback components, R4 and C5. The overall loop gain is the product of the modulator gain and the error amplifier gain. The DC modulator gain of the LM25574 is as follows:

The dominant low frequency pole of the modulator is determined by the load resistance (R_LOAD,) and output capacitance (C_OUT). The corner frequency of this pole is:

For R_LOAD = 20? and C_OUT = 22μF then f_p(MOD) = 362Hz

DC Gain_(MOD) = 0.5 × 20 = 20dB

For the design example of Section 6.2 the following modulator gain vs. frequency characteristic was measured as shown in Figure 7-3.

Figure 7-3 Gain and Phase of Modulator R_LOAD = 20 Ohms and C_OUT = 22μF

Components R4 and C5 configure the error amplifier as a type II configuration which has a pole at DC and a zero at f_Z = 1 / (2πR4C5). The error amplifier zero cancels the modulator pole leaving a single pole response at the crossover frequency of the loop gain. A single pole response at the crossover frequency yields a very stable loop with 90 degrees of phase margin.

For the design example, a target loop bandwidth (crossover frequency) of 25kHz was selected. The compensation network zero (f_Z) must be selected at least an order of magnitude less than the target crossover frequency. This requirement constrains the product of R4 and C5 for a desired compensation network zero 1 / (2π R4 C5) to be less than 2 kHz. Increasing R4, while proportionally decreasing C5, increases the error amp gain. Conversely, decreasing R4 while proportionally increasing C5, decreases the error amp gain. For the design example C5 was selected for 0.022 μF and R4 was selected for 24.9 k?. These values configure the compensation network zero at 290 Hz. The error amp gain at frequencies greater than f_Z is: R4 / R5, which is approximately 5 (14dB).

Figure 7-4 Error Amplifier Gain and Phase

The overall loop can be predicted as the sum (in dB) of the modulator gain and the error amp gain.

Figure 7-5 Overall Loop Gain and Phase

If a network analyzer is available, the modulator gain can be measured and the error amplifier gain can be configured for the desired loop transfer function. If a network analyzer is not available, the error amplifier compensation components can be designed with the guidelines given. Step load transient tests can be performed to verify acceptable performance. The step load goal is minimum overshoot with a damped response. C6 can be added to the compensation network to decrease noise susceptibility of the error amplifier. The value of C6 must be sufficiently small because the addition of this capacitor adds a pole in the error amplifier transfer function. This pole must be well beyond the loop crossover frequency. A good approximation of the location of the pole added by C6 is: f_p2 = fz × C5 / C6.