SLLSE39E June 2010 – May 2015 ISO7520C , ISO7521C
PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Pin Configuration and Functions
-
6 Specifications
- 6.1 Absolute Maximum Ratings
- 6.2 ESD Ratings
- 6.3 Recommended Operating Conditions
- 6.4 Thermal Information
- 6.5 Electrical Characteristics: VCC1 and VCC2 at 5 V ± 5%
- 6.6 Electrical Characteristics: VCC1 at 5 V ± 5%, VCC2 at 3.3 V ± 5%
- 6.7 Electrical Characteristics: VCC1 at 3.3 V ± 5%, VCC2 at 5 V ± 5%
- 6.8 Electrical Characteristics: VCC1 and VCC2 at 3.3 V ± 5%
- 6.9 Switching Characteristics: VCC1 and VCC2 at 5 V ± 5%
- 6.10 Switching Characteristics: VCC1 at 5 V ± 5%, VCC2 at 3.3 V ± 5%
- 6.11 Switching Characteristics: VCC1 at 3.3 V ± 5%, VCC2 at 5 V ± 5%
- 6.12 Switching Characteristics: VCC1 and VCC2 at 3.3 V ± 5%
- 6.13 Typical Characteristics
- 7 Parameter Measurement Information
- 8 Detailed Description
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
6 Specifications
6.1 Absolute Maximum Ratings(1)
| MIN | MAX | UNIT | |||||
|---|---|---|---|---|---|---|---|
| VCC1, VCC2 | Supply voltage(2) | –0.5 | 6 | V | |||
| VI | Voltage at INx, OUTx | –0.5 | VCC + 0.5(3) | V | |||
| IO | Output Current | –15 | 15 | mA | |||
| TJ | Maximum junction temperature | 150 | °C | ||||
| Tstg | Storage temperature | –65 | 150 | °C | |||
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values except differential I/O bus voltages are with respect to network ground terminal and are peak voltage values.
(3) Maximum voltage must not exceed 6 V.
6.2 ESD Ratings
| VALUE | UNIT | |||
|---|---|---|---|---|
| V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±4000 | V |
| Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±1000 | |||
| Machine model (MM) | ±200 | |||
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)| MIN | NOM | MAX | UNIT | ||
|---|---|---|---|---|---|
| VCC1, VCC2 | Supply voltage - 3.3-V Operation | 3.15 | 3.3 | 3.45 | V |
| Supply voltage - 5-V Operation | 4.75 | 5 | 5.25 | ||
| IOH | High-level output current | –4 | mA | ||
| IOL | Low-level output current | 4 | mA | ||
| VIH | High-level output voltage | 2 | 5.25 | V | |
| VIL | Low-level output voltage | 0 | 0.8 | V | |
| TA | Ambient temperature | -40 | 105 | °C | |
| TJ(1) | Junction temperature | –40 | 136 | °C | |
| 1/tui | Signaling rate | 0 | 1 | Mbps | |
| tui | Input pulse duration | 1 | µs | ||
(1) To maintain the recommended operating conditions for TJ, see Thermal Information.
6.4 Thermal Information
| THERMAL METRIC(1) | ISO7520C, ISO7521C | UNIT | |
|---|---|---|---|
| DW [SOIC] | |||
| 16 PINS | |||
| RθJA | Junction-to-ambient thermal resistance | 79.9 | °C/W |
| RθJC(top) | Junction-to-case (top) thermal resistance | 44.6 | °C/W |
| RθJB | Junction-to-board thermal resistance | 51.2 | °C/W |
| ψJT | Junction-to-top characterization parameter | 18.0 | °C/W |
| ψJB | Junction-to-board characterization parameter | 42.2 | °C/W |
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.
6.5 Electrical Characteristics: VCC1 and VCC2 at 5 V ± 5%
VCC1 and VCC2 at 5 V ±5%, TA = –40°C to 105°C| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
|---|---|---|---|---|---|---|---|
| VOH | High-level output voltage | IOH = –4 mA; See Figure 4 | VCCO –0.8(1) | 4.6 | V | ||
| IOH = –20 µA; See Figure 4 | VCCO –0.1 | 5 | |||||
| VOL | Low-level output voltage | IOL = 4 mA; See Figure 4 | 0.2 | 0.4 | V | ||
| IOL = 20 µA; See Figure 4 | 0 | 0.1 | |||||
| VI(HYS) | Input threshold voltage hysteresis | 400 | mV | ||||
| IIH | High-level input current | INx at VCCI(2) | 10 | µA | |||
| IIL | Low-level input current | INx at 0 V | –10 | µA | |||
| CMTI | Common-mode transient immunity | VI = VCCI or 0 V; See Figure 6 | 25 | 50 | kV/µs | ||
| SUPPLY CURRENT (ALL INPUTS SWITCHING WITH SQUARE-WAVE CLOCK SIGNAL FOR DYNAMIC ICC MEASUREMENT) | |||||||
| ISO7520C | |||||||
| ICC1 | Supply current for VCC1 | DC to 1 Mbps | VI = VCCI or 0 V, 15-pF load | 0.4 | 1 | mA | |
| ICC2 | Supply current for VCC2 | DC to 1 Mbps | VI = VCCI or 0 V, 15-pF load | 3 | 6 | mA | |
| ISO7521C | |||||||
| ICC1 | Supply current for VCC1 | DC to 1 Mbps | VI = VCCI or 0 V, 15-pF load | 2 | 4 | mA | |
| ICC2 | Supply current for VCC2 | DC to 1 Mbps | VI = VCCI or 0 V, 15-pF load | 2 | 4 | mA | |
(1) VCCO is the supply voltage, VCC1 or VCC2, for the output channel that is being measured.
(2) VCCI is the supply voltage, VCC1 or VCC2, for the input channel that is being measured.
6.6 Electrical Characteristics: VCC1 at 5 V ± 5%, VCC2 at 3.3 V ± 5%
VCC1 at 5 V ±5%, VCC2 at 3.3 V ±5%, TA = –40°C to 105°C| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
|---|---|---|---|---|---|---|---|
| VOH | High-level output voltage | IOH = –4 mA; See Figure 4 | ISO7521C (5-V side) | VCCO –0.8 | 4.6 | V | |
| ISO7520C/7521C(3.3-V side) | VCCO –0.4 | 3 | |||||
| IOH = –20 µA; See Figure 4 | VCCO –0.1 | VCCO | |||||
| VOL | Low-level output voltage | IOL = 4 mA; See Figure 4 | 0.2 | 0.4 | V | ||
| IOL = 20 µA; See Figure 4 | 0 | 0.1 | |||||
| VI(HYS) | Input threshold voltage hysteresis | 400 | mV | ||||
| IIH | High-level input current | INx at VCCI | 10 | µA | |||
| IIL | Low-level input current | INx at 0 V | –10 | µA | |||
| CMTI | Common-mode transient immunity | VI = VCCI or 0 V; See Figure 6 | 25 | 40 | kV/µs | ||
| SUPPLY CURRENT (ALL INPUTS SWITCHING WITH SQUARE-WAVE CLOCK SIGNAL FOR DYNAMIC ICC MEASUREMENT) | |||||||
| ISO7520C | |||||||
| ICC1 | Supply current for VCC1 | DC to 1 Mbps | VI = VCCI or 0 V, 15-pF load | 0.4 | 1 | mA | |
| ICC2 | Supply current for VCC2 | DC to 1 Mbps | VI = VCCI or 0 V, 15-pF load | 2 | 4.5 | mA | |
| ISO7521C | |||||||
| ICC1 | Supply current for VCC1 | DC to 1 Mbps | VI = VCCI or 0 V, 15-pF load | 2 | 4 | mA | |
| ICC2 | Supply current for VCC2 | DC to 1 Mbps | VI = VCCI or 0 V, 15-pF load | 1.5 | 3.5 | mA | |
6.7 Electrical Characteristics: VCC1 at 3.3 V ± 5%, VCC2 at 5 V ± 5%
VCC1 at 3.3 V ±5%, VCC2 at 5 V ±5%, TA = –40°C to 105°C| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
|---|---|---|---|---|---|---|---|
| VOH | High-level output voltage | IOH = –4 mA; See Figure 4 | ISO7520C/7521C (5-V side) | VCCO –0.8 | 4.6 | V | |
| ISO7521C (3.3-V side) | VCCO –0.4 | 3 | |||||
| IOH = –20 µA; See Figure 4 | VCCO –0.1 | VCCO | |||||
| VOL | Low-level output voltage | IOL = 4 mA; See Figure 4 | 0.2 | 0.4 | V | ||
| IOL = 20 µA; See Figure 4 | 0 | 0.1 | |||||
| VI(HYS) | Input threshold voltage hysteresis | 400 | mV | ||||
| IIH | High-level input current | INx at VCCI | 10 | µA | |||
| IIL | Low-level input current | INx at 0 V | –10 | µA | |||
| CMTI | Common-mode transient immunity | VI = VCCI or 0 V; See Figure 6 | 25 | 40 | kV/µs | ||
| SUPPLY CURRENT (ALL INPUTS SWITCHING WITH SQUARE-WAVE CLOCK SIGNAL FOR DYNAMIC ICC MEASUREMENT) | |||||||
| ISO7520C | |||||||
| ICC1 | Supply current for VCC1 | DC to 1 Mbps | VI = VCCI or 0 V, 15-pF load | 0.2 | 0.7 | mA | |
| ICC2 | Supply current for VCC2 | DC to 1 Mbps | VI = VCCI or 0 V, 15-pF load | 3 | 6 | mA | |
| ISO7521C | |||||||
| ICC1 | Supply current for VCC1 | DC to 1 Mbps | VI = VCCI or 0 V, 15-pF load | 1.5 | 3.5 | mA | |
| ICC2 | Supply current for VCC2 | DC to 1 Mbps | VI = VCCI or 0 V, 15-pF load | 2 | 4 | mA | |
6.8 Electrical Characteristics: VCC1 and VCC2 at 3.3 V ± 5%
VCC1 and VCC2 at 3.3 V ±5%, TA = –40°C to 105°C| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
|---|---|---|---|---|---|---|---|
| VOH | High-level output voltage | IOH = –4 mA; See Figure 4 | VCCO –0.4 | 3 | V | ||
| IOH = –20 µA; See Figure 4 | VCCO –0.1 | 3.3 | |||||
| VOL | Low-level output voltage | IOL = 4 mA; See Figure 4 | 0.2 | 0.4 | V | ||
| IOL = 20 µA; See Figure 4 | 0 | 0.1 | |||||
| VI(HYS) | Input threshold voltage hysteresis | 400 | mV | ||||
| IIH | High-level input current | INx at VCCI | µA | ||||
| IIL | Low-level input current | INx at 0 V | –10 | µA | |||
| CMTI | Common-mode transient immunity | VI = VCCI or 0 V; See Figure 6 | 25 | 40 | kV/µs | ||
| SUPPLY CURRENT (ALL INPUTS SWITCHING WITH SQUARE-WAVE CLOCK SIGNAL FOR DYNAMIC ICC MEASUREMENT) | |||||||
| ISO7520C | |||||||
| ICC1 | Supply current for VCC1 | DC to 1 Mbps | VI = VCCI or 0 V, 15-pF load | 0.2 | 0.7 | mA | |
| ICC2 | Supply current for VCC2 | DC to 1 Mbps | VI = VCCI or 0 V, 15-pF load | 2 | 4.5 | mA | |
| ISO7521C | |||||||
| ICC1 | Supply current for VCC1 | DC to 1 Mbps | VI = VCCI or 0 V, 15-pF load | 1.5 | 3.5 | mA | |
| ICC2 | Supply current for VCC2 | DC to 1 Mbps | VI = VCCI or 0 V, 15-pF load | 1.5 | 3.5 | mA | |
Power Dissipation Characteristics
over operating free-air temperature range (unless otherwise noted)| PARAMETER | ISO7520C, ISO7521C | UNIT | |
|---|---|---|---|
| DW [SOIC] | |||
| 16 PINS | |||
| PD | Device power dissipation, VCC1 = VCC2 = 5.25 V, TJ = 150°C, CL = 15 pF, Input a 0.5 MHz 50% duty cycle square wave |
42 | mW |
6.9 Switching Characteristics: VCC1 and VCC2 at 5 V ± 5%
VCC1 and VCC2 at 5 V ±5%, TA = –40°C to 105°C| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| tPLH, tPHL | Propagation delay time | See Figure 4 | 9 | 14 | ns | |
| PWD(1) | Pulse width distortion |tPHL – tPLH| | 0.3 | 3.7 | ns | ||
| tsk(pp) | Part-to-part skew time | 4.9 | ns | |||
| tsk(o) | Channel-to-channel output skew time | 3.6 | ns | |||
| tr | Output signal rise time | See Figure 4 | 1 | ns | ||
| tf | Output signal fall time | 1 | ns | |||
| tfs | Fail-safe output delay time from input power loss | See Figure 5 | 6 | µs | ||
(1) Also known as pulse skew.
6.10 Switching Characteristics: VCC1 at 5 V ± 5%, VCC2 at 3.3 V ± 5%
VCC1 at 5 V ± 5%, VCC2 at 3.3 V ± 5%, TA = –40°C to 105°C| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| tPLH, tPHL | Propagation delay time | See Figure 4 | 10 | 17 | ns | |
| PWD(1) | Pulse width distortion |tPHL – tPLH| | 0.5 | 5.6 | ns | ||
| tsk(pp) | Part-to-part skew time | 6.3 | ns | |||
| tsk(o) | Channel-to-channel output skew time | 4 | ns | |||
| tr | Output signal rise time | See Figure 4 | 2 | ns | ||
| tf | Output signal fall time | 2 | ns | |||
| tfs | Fail-safe output delay time from input power loss | See Figure 5 | 6 | µs | ||
(1) Also known as pulse skew.
6.11 Switching Characteristics: VCC1 at 3.3 V ± 5%, VCC2 at 5 V ± 5%
VCC1 at 3.3 V ±5%, VCC2 at 5 V ±5%, TA = –40°C to 105°C| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| tPLH, tPHL | Propagation delay time | See Figure 4 | 10 | 17 | ns | |
| PWD(1) | Pulse width distortion |tPHL – tPLH| | 0.5 | 4 | ns | ||
| tsk(pp) | Part-to-part skew time | 8.5 | ns | |||
| tsk(o) | Channel-to-channel output skew time | 4 | ns | |||
| tr | Output signal rise time | See Figure 4 | 2 | ns | ||
| tf | Output signal fall time | 2 | ns | |||
| tfs | Fail-safe output delay time from input power loss | See Figure 5 | 6 | µs | ||
(1) Also known as pulse skew.
6.12 Switching Characteristics: VCC1 and VCC2 at 3.3 V ± 5%
VCC1 and VCC2 at 3.3 V ±5%, TA = –40°C to 105°C| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| tPLH, tPHL | Propagation delay time | See Figure 4 | 12 | 20 | ns | |
| PWD(1) | Pulse width distortion |tPHL – tPLH| | 1 | 5 | ns | ||
| tsk(pp) | Part-to-part skew time | 6.8 | ns | |||
| tsk(o) | Channel-to-channel output skew time | 5.5 | ns | |||
| tr | Output signal rise time | See Figure 4 | 2 | ns | ||
| tf | Output signal fall time | 2 | ns | |||
| tfs | Fail-safe output delay time from input power loss | See Figure 5 | 6 | µs | ||
(1) Also known as pulse skew.
6.13 Typical Characteristics
Figure 1. Fail-Safe Voltage Threshold vs Free-Air Temperature
Figure 3. Low-Level Output Current vs Low-Level Output Voltage
Figure 2. High-Level Output Current vs High-Level Output Voltage