ZHCSED5 November 2015 ISO7330-Q1 , ISO7331-Q1
PRODUCTION DATA.
- 1 特性
- 2 應用
- 3 說明
- 4 修訂歷史記錄
- 5 Pin Configuration and Functions
-
6 Specifications
- 6.1 Absolute Maximum Ratings
- 6.2 ESD Ratings
- 6.3 Recommended Operating Conditions
- 6.4 Thermal Information
- 6.5 Electrical Characteristics—5-V Supply
- 6.6 Supply Current Characteristics—5-V Supply
- 6.7 Electrical Characteristics—3.3-V Supply
- 6.8 Supply Current Characteristics—3.3-V Supply
- 6.9 Power Dissipation Characteristics
- 6.10 Switching Characteristics—5-V Supply
- 6.11 Switching Characteristics—3.3-V Supply
- 6.12 Typical Characteristics
- 7 Parameter Measurement Information
- 8 Detailed Description
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12器件和文檔支持
- 13機械、封裝和可訂購信息
7 Parameter Measurement Information
A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 50 kHz, 50% duty cycle, tr ≤ 3 ns, tf ≤ 3 ns, ZO = 50 Ω. At the input, a 50-Ω resistor is required to terminate the Input Generator signal. It is not needed in actual application.
B. CL = 15 pF and includes instrumentation and fixture capacitance within ±20%.
Figure 11. Switching Characteristic Test Circuit and Voltage Waveforms
A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 10 kHz, 50% duty cycle,
tr ≤ 3 ns, tf ≤ 3 ns, ZO = 50 Ω.
tr ≤ 3 ns, tf ≤ 3 ns, ZO = 50 Ω.
B. CL = 15 pF and includes instrumentation and fixture capacitance within ±20%.
Figure 12. Enable and Disable Propagation Delay Time Test Circuit and Waveform
A. CL = 15 pF and includes instrumentation and fixture capacitance within ±20%.
Figure 13. Fail-Safe Output Delay-Time Test Circuit and Voltage Waveforms
A. CL = 15 pF and includes instrumentation and fixture capacitance within ±20%.
Figure 14. Common-Mode Transient Immunity Test Circuit