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ZHCS957C June 2012 – December 2015 DRV8806

PRODUCTION DATA.

封裝選項

機械數據 (封裝 | 引腳)

PWP|16
- MPDS371C

散熱焊盤機械數據 (封裝 | 引腳)

PWP|16
- PPTD312C

訂購信息

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾⁽²⁾

		MIN	MAX	UNIT
VM	Power supply voltage	–0.3	43	V
VOUTx	Output voltage	–0.3	43	V
VCLAMP	Clamp voltage	–0.3	43	V
SDATOUT, nFAULT	Output current		20	mA
	Peak clamp diode current⁽³⁾		2	A
	DC or RMS clamp diode current⁽³⁾		1	A
	Digital input pin voltage	–0.5	7	V
SDATOUT, nFAULT	Digital output pin voltage	–0.5	7	V
	Peak motor drive output current, t < 1 μS	Internally limited		A
	Continuous total power dissipation⁽³⁾	See Thermal Information
T_J	Operating virtual junction temperature⁽³⁾	–40	150	°C
T_stg	Storage temperature	–60	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltage values are with respect to network ground terminal.

(3) Power dissipation and thermal limits must be observed.

6.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins⁽¹⁾	±6000	V
V_(ESD)	Electrostatic discharge	Charged device model (CDM), per JEDEC specification JESD22-C101, all pins⁽²⁾	±1000	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

		MIN	MAX	UNIT
V_M	Power supply voltage	8.2	40	V
V_CLAMP	Output clamp voltage⁽²⁾	0	40	V
I_OUT	Continuous output current, single channel on, T_A = 25°C⁽¹⁾		2	A
I_OUT	Continuous output current, four channels on, T_A = 25°C⁽¹⁾		1	A

(1) Power dissipation and thermal limits must be observed.

(2) VCLAMP is not a power supply input pin - it only connects to the output clamp diodes.

6.4 Thermal Information

THERMAL METRIC⁽¹⁾		DRV8806	UNIT
		PWP (HTSSOP)
		16 PINS
R_θJA	Junction-to-ambient thermal resistance	39.6	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	24.6	°C/W
R_θJB	Junction-to-board thermal resistance	20.3	°C/W
ψ_JT	Junction-to-top characterization parameter	0.7	°C/W
ψ_JB	Junction-to-board characterization parameter	20.1	°C/W
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	2.3	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

T_A = 25°C, over recommended operating conditions (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
POWER SUPPLIES
I_VM	VM operating supply current	V_M = 24 V		1.6	3	mA
V_UVLO	VM undervoltage lockout voltage	V_M rising			8.2	V
LOGIC-LEVEL INPUTS (SCHMITT TRIGGER INPUTS WITH HYSTERESIS)
V_IL	Input low voltage				0.8	V
V_IH	Input high voltage		2			V
V_HYS	Input hysteresis			0.45		V
I_IL	Input low current	VIN = 0	–20		20	μA
I_IH	Input high current	VIN = 3.3 V			100	μA
R_PD	Pulldown resistance			100		kΩ
nFAULT OUTPUT (OPEN-DRAIN OUTPUT)
V_OL	Output low voltage	I_O = 5 mA			0.5	V
I_OH	Output high leakage current	V_O = 3.3 V			1	μA
SDATOUT OUTPUT (PUSH-PULL OUTPUT WITH INTERNAL PULLUP)
V_OL	Output low voltage	I_O = 5 mA		0.5		V
V_OH	Output high voltage	I_O = 100 µA, V_M = 11 V - 60 V, peak			6.5	V
		I_O = 100 µA, V_M = 11 V - 60 V, steady state	3.3	4.5	5.6	V
		I_O = 100 µA, V_M = 8.2 V - 11 V, steady state	2.5			V
I_SRC	Output source current	V_M= 24 V			1	mA
I_SNK	Output sink current	V_M= 24 V			5	mA
LOW-SIDE FETS
R_DS(ON)	FET on resistance	V_M = 24 V, I_O = 700 mA, T_J = 25°C		0.5		Ω
R_DS(ON)	FET on resistance	V_M = 24 V, I_O = 700 mA, T_J = 85°C		0.75	0.8	Ω
I_OFF	Open load detect current		0	25	50	μA
HIGH-SIDE DIODES
V_F	Diode forward voltage	V_M = 24 V, I_O = 700 mA, T_J = 25°C		0.9		V
I_OFF	Off state leakage current	V_M = 24 V, T_J = 25°C	–50		50	μA
OUTPUTS
t_R	Rise time	V_M = 24 V, I_O = 700 mA, Resistive load	50		300	ns
t_F	Fall time	V_M = 24 V, I_O = 700 mA, Resistive load	50		150	ns
PROTECTION CIRCUITS
I_OCP	Overcurrent protection trip level		3		5	A
t_OCP	Overcurrent protection deglitch time			3.5		µs
t_OL	Open load detect deglitch time			15		µs
t_RETRY	Overcurrent protection re-try time			1.2		ms
T_TSD	Thermal shutdown temperature	Die temperature	150	160	180	°C

6.6 Timing Requirements

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

			MIN	NOM	MAX	UNIT
1	t_CYC	Clock cycle time	62			ns
2	t_CLKH	Clock high time	25			ns
3	t_CLKL	Clock low time	25			ns
4	t_SU(SDATIN)	Setup time, SDATIN to SCLK	5			ns
5	t_H(SDATIN)	Hold time, SDATIN to SCLK	1			ns
6	t_D(SDATOUT)	Delay time, SCLK to SDATOUT, no external pullup resistor, C_OUT = 100 pF		50	100	ns
7	t_W(LATCH)	Pulse width, LATCH	200			ns
8	t_OE(ENABLE)	Enable time, nENBL to output low		60		ns
9	t_D(LATCH)	Delay time, LATCH to output change		200		ns
—	t_RESET	RESET pulse width	20			µs
10	t_D(RESET)	Reset delay before clock	20			µs
11	t_STARTUP	Start-up delay VM applied before clock	55			µs

(1) Not production tested.

More than 400 ns of delay should exist between the final SCLK rising edge and the LATCH rising edge. This ensures that the last data bit is shifted into the device properly.

Figure 1. DRV8806 Timing Requirements

6.7 Typical Characteristics

Figure 2. Supply Current vs Temperature

Figure 4. R_DS(ON) vs Temperature

Figure 3. Supply Current vs Supply Voltage

Figure 5. R_DS(ON) vs Supply Voltage