SLVSBA5D October 2012 – April 2016 DRV8313
PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Detailed Description
- 8 Application and Implementation
- 9 Power Supply Recommendations
- 10Layout
- 11Device and Documentation Support
- 12Mechanical, Packaging, and Orderable Information
封裝選項
機械數(shù)據(jù) (封裝 | 引腳)
散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)
訂購信息
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)(2)(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to the network ground terminal.
6.2 ESD Ratings
| VALUE | UNIT | ||||
|---|---|---|---|---|---|
| V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±3000 | V | |
| Charged device model (CDM), per JEDEC specification JESD22-C101(2) | ±1500 | ||||
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| VM | Motor power-supply voltage(1) | 8 | 60 | V |
| VIN | Digital pin voltage | 0 | 5.5 | V |
| fPWM | Applied PWM signal on ENx, INx | 0 | 250 | kHz |
| VGNDX | PGNDx pin voltage | –500 | 500 | mV |
| IV3P3 | V3P3 load current | 0 | 10(2) | mA |
| TA | Operating ambient temperature | –40 | 125 | °C |
(1) Both VM pins must be connected to the same supply voltage.
(2) Power dissipation and thermal limits must be observed.
6.4 Thermal Information
| THERMAL METRIC (1) | DRV8313 | UNIT | ||
|---|---|---|---|---|
| PWP (HTSSOP) | RHH (VQFN) | |||
| 28 PINS | 36 PINS | |||
| RθJA | Junction-to-ambient thermal resistance | 31.6 | 31.1 | °C/W |
| RθJC(top) | Junction-to-case (top) thermal resistance | 15.9 | 17.3 | °C/W |
| RθJB | Junction-to-board thermal resistance | 5.6 | 5.6 | °C/W |
| ψJT | Junction-to-top characterization parameter | 0.2 | 0.2 | °C/W |
| ψJB | Junction-to-board characterization parameter | 5.5 | 5.6 | °C/W |
| RθJC(bot) | Junction-to-case (bottom) thermal resistance | 1.4 | 1.3 | °C/W |
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.
6.5 Electrical Characteristics
TA = 25°C, over operating free-air temperature range (unless otherwise noted)| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| POWER SUPPLIES | ||||||
| IVM | VM operating supply current | VM = 24 V, fPWM < 50 kHz | 1 | 5 | mA | |
| IVMQ | VM sleep-mode supply current | VM = 24 V | 500 | 800 | µA | |
| INTERNAL REGULATOR (V3P3) | ||||||
| V3P3 | V3P3 voltage | IOUT = 0 to 10 mA | 3.1 | 3.3 | 3.52 | V |
| LOGIC-LEVEL INPUTS (nSLEEP, ENx, INx) | ||||||
| VIL | Input low voltage | 0.6 | 0.7 | V | ||
| VIH | Input high voltage | 2.2 | 5.25 | V | ||
| VHYS | Input hysteresis | 50 | 600 | mV | ||
| IIL | Input low current | VIN = 0 | –5 | 5 | µA | |
| IIH | Input high current | VIN = 3.3 V | 100 | µA | ||
| RPD | Pulldown resistance | 100 | kΩ | |||
| OPEN-DRAIN OUTPUTS (nFAULT and nCOMPO) | ||||||
| VOL | Output low voltage | IO = 5 mA | 0.5 | V | ||
| IOH | Output high leakage current | VO = 3.3 V | 1 | µA | ||
| COMPARATOR (COMPP, COMPN, nCOMPO) | ||||||
| VCM | Common-mode input-voltage range | 0 | 5 | V | ||
| VIO | Input offset voltage | –7 | 7 | mV | ||
| IIB | Input bias current | –300 | 300 | nA | ||
| tR | Response time | 100-mV step with 10-mV overdrive | 2 | µs | ||
| H-BRIDGE FETs | ||||||
| rDS(on) | High-side FET ON-resistance | VM = 24 V, IO = 1 A, TJ = 25°C | 0.24 | Ω | ||
| VM = 24 V, IO = 1 A, TJ = 85°C(1) | 0.29 | 0.39 | ||||
| Low-side FET ON-resistance | VM = 24 V, IO = 1 A, TJ = 25°C | 0.24 | Ω | |||
| VM = 24 V, IO = 1 A, TJ = 85°C(1) | 0.29 | 0.39 | ||||
| IOFF | Off-state leakage current | –2 | 2 | µA | ||
| PROTECTION CIRCUITS | ||||||
| VUVLO | VM undervoltage lockout voltage | VM rising | 6.3 | 8 | V | |
| IOCP | Overcurrent protection trip level | 3 | 5 | A | ||
| tOCP | Overcurrent protection deglitch time | 5 | µs | |||
| TTSD(1) | Thermal shutdown temperature | Die temperature | 150 | 160 | 180 | °C |
| THYS(1) | Thermal shutdown hysteresis | Die temperature | 35 | °C | ||
(1) Specification based on design and characterization data
6.6 Switching Characteristics
TA = 25°C, VM = 24 V, RL = 20 Ω| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| t1 | Delay time, ENx high to OUTx high | INx = 1 | 130 | 330 | ns | |
| t2 | Delay time, ENx low to OUTx low | INx = 1 | 275 | 475 | ns | |
| t3 | Delay time, ENx high to OUTx low | INx = 0 | 100 | 300 | ns | |
| t4 | Delay time, ENx low to OUTx high | INx = 0 | 200 | 400 | ns | |
| t5 | Delay time, INx high to OUTx high | ENx = 1 | 300 | 500 | ns | |
| t6 | Delay time, INx low to OUTx low | ENx = 1 | 275 | 475 | ns | |
| tr | Output rise time, resistive load to GND | 30 | 150 | ns | ||
| tf | Output fall time, resistive load to GND | 30 | 150 | ns | ||
| tDEAD(1) | Output dead time | 90 | ns | |||
(1) Specified by design and characterization data
Figure 1. DRV8313 Switching Characteristics
6.7 Typical Characteristics
