ZHCSEC3F October 2015 – January 2025 DP83867CS , DP83867E , DP83867IS
PRODUCTION DATA
請(qǐng)參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
| BIT | BIT NAME | DEFAULT | DESCRIPTION |
|---|---|---|---|
| 15:0 | EN_CTRL_REC_EQ | 0x0000, RW | Enable control of receiver's equalizer. Value 0x0000 can further improve the immunity margins during EMC testing. |