SWRS045F January 2006 – November 2018 CC1021
PRODUCTION DATA.
| PIN NO. | PIN NAME | TYPE | DESCRIPTION |
|---|---|---|---|
| — | AGND | Ground (analog) | Exposed die attached pad. Must be soldered to a solid ground plane as this is the ground connection for all analog modules. See Section 6.3 for more details. |
| 1 | PCLK | Digital input | Programming clock for SPI configuration interface |
| 2 | PDI | Digital input | Programming data input for SPI configuration interface |
| 3 | PDO | Digital output | Programming data output for SPI configuration interface |
| 4 | DGND | Ground (digital) | Ground connection (0 V) for digital modules and digital I/O |
| 5 | DVDD | Power (digital) | Power supply (3 V typical) for digital modules and digital I/O |
| 6 | DGND | Ground (digital) | Ground connection (0 V) for digital modules (substrate) |
| 7 | DCLK | Digital output | Clock for data in both receive and transmit mode |
| Can be used as receive data output in asynchronous mode | |||
| 8 | DIO | Digital input/output | Data input in transmit mode; data output in receive mode |
| Can also be used to start power-up sequencing in receive | |||
| 9 | LOCK | Digital output | PLL Lock indicator, active low. Output is asserted (low) when PLL is in lock. The pin can also be used as a general digital output, or as receive data output in synchronous NRZ/Manchester mode |
| 10 | XOSC_Q1 | Analog input | Crystal oscillator or external clock input |
| 11 | XOSC_Q2 | Analog output | Crystal oscillator |
| 12 | AVDD | Power (analog) | Power supply (3 V typical) for crystal oscillator |
| 13 | AVDD | Power (analog) | Power supply (3 V typical) for the IF VGA |
| 14 | LNA_EN | Digital output | General digital output. Can be used for controlling an external LNA if higher sensitivity is needed. |
| 15 | PA_EN | Digital output | General digital output. Can be used for controlling an external PA if higher output power is needed. |
| 16 | AVDD | Power (analog) | Power supply (3 V typical) for global bias generator and IF anti-alias filter |
| 17 | R_BIAS | Analog output | Connection for external precision bias resistor (82 kΩ, ±1%) |
| 18 | AVDD | Power (analog) | Power supply (3 V typical) for LNA input stage |
| 19 | RF_IN | RF Input | RF signal input from antenna (external AC-coupling) |
| 20 | AVDD | Power (analog) | Power supply (3 V typical) for LNA |
| 21 | RF_OUT | RF output | RF signal output to antenna |
| 22 | AVDD | Power (analog) | Power supply (3 V typical) for LO buffers, mixers, prescaler, and first PA stage |
| 23 | AVDD | Power (analog) | Power supply (3 V typical) for VCO |
| 24 | VC | Analog input | VCO control voltage input from external loop filter |
| 25 | AGND | Ground (analog) | Ground connection (0 V) for analog modules (guard) |
| 26 | AD_REF | Power (analog) | 3 V reference input for ADC |
| 27 | AVDD | Power (analog) | Power supply (3 V typical) for charge pump and phase detector |
| 28 | CHP_OUT | Analog output | PLL charge pump output to external loop filter |
| 29 | AVDD | Power (analog) | Power supply (3 V typical) for ADC |
| 30 | DGND | Ground (digital) | Ground connection (0 V) for digital modules (guard) |
| 31 | DVDD | Power (digital) | Power supply connection (3 V typical) for digital modules |
| 32 | PSEL | Digital input | Programming chip select, active low, for configuration interface. Internal pullup resistor. |