5.12.1 VCO, Charge Pump and PLL Loop Filter

The VCO is completely integrated and operates in the 1608 to 1920 MHz range. A frequency divider is used to get a frequency in the UHF range (402 to 470 and 804 to 930 MHz). The BANDSELECT bit in the ANALOG register selects the frequency band.

The VCO frequency is given by Equation 24.

Equation 24.

The VCO frequency is divided by 2 and by 4 to generate frequencies in the two bands, respectively.

The VCO sensitivity (sometimes referred to as VCO gain) varies over frequency and operating conditions. Typically the VCO sensitivity varies between 12 and 36 MHz/V. For calculations the geometrical mean at 21 MHz/V can be used. The PLL calibration (explained below) measures the actual VCO sensitivity and adjusts the charge pump current accordingly to achieve correct PLL loop gain and bandwidth (higher charge pump current when VCO sensitivity is lower).

Equation 25 through Equation 29 can be used for calculating PLL loop filter component values, see Figure 6-1, for a desired PLL loop bandwidth, BW.

Equation 25.

Equation 26.

Equation 27.

Equation 28.

Equation 29.

Define a minimum PLL loop bandwidth as shown in Equation 30.

Equation 30.

If BW_min > Baud rate/3 then set BW = BW_min and if BW_min < Baud rate/3 then set BW = Baud rate/3 in Equation 25 through Equation 29.

There are two special cases when using the recommended 14.7456 MHz crystal:

1. If the data rate is 4.8 kBaud or below and the channel spacing is 12.5 kHz the following loop filter components are recommended:

C6 = 220 nF

C7 = 8200 pF

C8 = 2200 pF

R2 = 1.5 kΩ

R3 = 4.7 kΩ

2. If the data rate is 4.8 kBaud or below and the channel spacing is different from 12.5 kHz the following loop filter components are recommended:

C6 = 100 nF

C7 = 3900 pF

C8 = 1000 pF

R2 = 2.2 kΩ

R3 = 6.8 kΩ

After calibration the PLL bandwidth is set by the PLL_BW register in combination with the external loop filter components calculated above. The PLL_BW can be found from Equation 31.

Equation 31.

Where:

f_ref is the reference frequency (in MHz).

The PLL loop filter bandwidth increases with increasing PLL_BW setting. Note that in SmartRF Studio PLL_BW is fixed to 9E hex when the channel spacing is set up for 12.5 kHz, optimized selectivity.

After calibration the applied charge pump current (CHP_CURRENT[3:0]) can be read in the STATUS1 register. The charge pump current is approximately given by Equation 32.

Equation 32.

The combined charge pump and phase detector gain (in A/rad) is given by the charge pump current divided by 2π.

The PLL bandwidth will limit the maximum modulation frequency and hence, data rate.