ZHCSNF1 February 2021 BQ25960
PRODUCTION DATA
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 Revision History
- 5 Description (continued)
- 6 Device Comparison Table
- 7 Pin Configuration and Functions
- 8 Specifications
-
9 Detailed Description
- 9.1 Overview
- 9.2 Functional Block Diagram
- 9.3
Feature Description
- 9.3.1 Charging System
- 9.3.2 Battery Charging Profile
- 9.3.3 Device Power Up
- 9.3.4 Device HIZ State
- 9.3.5 Dual Input Bi-Directional Power Path Management
- 9.3.6 Bypass Mode Operation
- 9.3.7 Charging Start-Up
- 9.3.8 Adapter Removal
- 9.3.9 Integrated 16-Bit ADC for Monitoring and Smart Adapter Feedback
- 9.3.10 Device Modes and Protection Status
- 9.3.11 INT Pin, STAT, FLAG, and MASK Registers
- 9.3.12 Dual Charger Operation Using Primary and Secondary Modes
- 9.3.13 CDRVH and CDRVL_ADDRMS Functions
- 9.4 Programming
- 9.5 Register Maps
- 10Application and Implementation
- 11Power Supply Recommendations
- 12Layout
- 13Device and Documentation Support
- 14Mechanical, Packaging, and Orderable Information
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- YBG|36
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
訂購信息
9.3.5.2 Single Input from VAC to VBUS without ACFET-RBFET
In this scenario, VAC1 and VAC2 are both shorted to VBUS, ACDRV1 and ACDRV2 are pulled down to ground. The table below summarizes the VAC1/VAC2, ACDRV1/ACDRV2 connection, register control, and status functions.
Table 9-1 Single Input without External
FET Summary
| INPUT CONFIGURATION | SINGLE INPUT |
|---|---|
| External FET connection | No external FET |
| Input pin connection | VAC1 and VAC2 short to VBUS |
| ACDRV pin connection | ACDRV1 and ACDRV2 short to ground |
| ACDRV1_STAT | 0 |
| ACDRV2_STAT | 0 |
| DIS_ACDRV_BOTH | 1 |
| ACRB1_CONFIG_STAT | 0 |
| ACRB2_CONFIG_STAT | 0 |
| EN_HIZ | No impact on ACDRV |
Figure 9-3 Single input
without ACFET-RBFET