ZHCSK78A september 2019 – august 2023 BQ21061
PRODUCTION DATA
- 1
- 1 特性
- 2 應用
- 3 說明
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3
Feature Description
- 7.3.1 Linear Charger and Power Path
- 7.3.2 Protection Mechanisms
- 7.3.3 VDD LDO
- 7.3.4 Load Switch/LDO Output and Control
- 7.3.5 PMID Power Control
- 7.3.6 System Voltage (PMID) Regulation
- 7.3.7 MR Wake and Reset Input
- 7.3.8 14-Second Watchdog for HW Reset
- 7.3.9 Faults Conditions and Interrupts ( INT)
- 7.3.10 Power Good ( PG) Pin
- 7.3.11 External NTC Monitoring (TS)
- 7.3.12 I2C Interface
- 7.4 Device Functional Modes
- 7.5 Register Map
- 8 Application and Implementation
- 9 Power Supply Recommendations
- 10Layout
- 11Device and Documentation Support
- 12Mechanical, Packaging, and Orderable Information
7.4.5 Power-Up/Down Sequencing
The power-up and power-down sequences for the BQ21061 are shown below. Upon VIN insertion, VIN> VUVLO, the device wakes up, powering the VDD rail. If VIN > VBAT + VSLP and VIN < VOVP, PMID will be powered by VIN and if VIN > VIN_DPM charging will start if enabled.
In the case where VIN < VUVLO and the battery is inserted (VBAT > VBATUVLO), the device will immediately enter Ship Mode unless MR is held low. Upon battery insertion the VDD rail will come up to allow the device to check the MR state and if MR is high VDD will immediately be disabled and the device will enter Ship Mode. If MR is low, the device will start the WAKE timer and power up PMID and other rails if MR is held low for longer than tWAKE1.
Figure 7-14 BQ21061 Wake-Up Upon Supply
Insertion
Figure 7-15 BQ21061 Wake-Up Upon Battery
Insertion